mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-13 23:29:27 +00:00
6b7d99d473
This patch replaces the control flow handling with a new pass which structurize the graph before transforming it to machine instruction. This has a couple of different advantages and currently fixes 20 piglit tests without a single regression. It is now a general purpose transformation that could be not only be used for SI/R6xx, but also for other hardware implementations that use a form of structurized control flow. v2: further cleanup, fixes and documentation Patch by: Christian König Signed-off-by: Christian König <deathsimple@vodafone.de> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170591 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.6 KiB
CMake
56 lines
1.6 KiB
CMake
set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
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tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
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tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
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tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
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tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
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tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
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tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
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tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
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tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
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tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
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add_public_tablegen_target(AMDGPUCommonTableGen)
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add_llvm_target(R600CodeGen
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AMDIL7XXDevice.cpp
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AMDILCFGStructurizer.cpp
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AMDILDevice.cpp
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AMDILDeviceInfo.cpp
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AMDILEvergreenDevice.cpp
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AMDILFrameLowering.cpp
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AMDILIntrinsicInfo.cpp
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AMDILISelDAGToDAG.cpp
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AMDILISelLowering.cpp
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AMDILNIDevice.cpp
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AMDILPeepholeOptimizer.cpp
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AMDILSIDevice.cpp
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AMDGPUAsmPrinter.cpp
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AMDGPUMCInstLower.cpp
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AMDGPUSubtarget.cpp
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AMDGPUStructurizeCFG.cpp
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AMDGPUTargetMachine.cpp
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AMDGPUISelLowering.cpp
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AMDGPUConvertToISA.cpp
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AMDGPUInstrInfo.cpp
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AMDGPURegisterInfo.cpp
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R600ExpandSpecialInstrs.cpp
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R600InstrInfo.cpp
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R600ISelLowering.cpp
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R600MachineFunctionInfo.cpp
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R600RegisterInfo.cpp
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SIAnnotateControlFlow.cpp
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SIAssignInterpRegs.cpp
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SIInstrInfo.cpp
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SIISelLowering.cpp
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SILowerLiteralConstants.cpp
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SILowerControlFlow.cpp
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SIMachineFunctionInfo.cpp
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SIRegisterInfo.cpp
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)
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add_dependencies(LLVMR600CodeGen intrinsics_gen)
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add_subdirectory(InstPrinter)
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add_subdirectory(TargetInfo)
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add_subdirectory(MCTargetDesc)
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