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844731a7f1
several things that were neither in an anonymous namespace nor static but not intended to be global. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51017 91177308-0d34-0410-b5e6-96231b3b80d8
98 lines
3.3 KiB
C++
98 lines
3.3 KiB
C++
//===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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#include "Alpha.h"
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#include "AlphaJITInfo.h"
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#include "AlphaTargetAsmInfo.h"
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#include "AlphaTargetMachine.h"
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#include "llvm/Module.h"
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#include "llvm/PassManager.h"
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#include "llvm/Target/TargetMachineRegistry.h"
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using namespace llvm;
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// Register the targets
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static RegisterTarget<AlphaTargetMachine> X("alpha", " Alpha (incomplete)");
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const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
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return new AlphaTargetAsmInfo(*this);
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}
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unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) {
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// We strongly match "alpha*".
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std::string TT = M.getTargetTriple();
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if (TT.size() >= 5 && TT[0] == 'a' && TT[1] == 'l' && TT[2] == 'p' &&
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TT[3] == 'h' && TT[4] == 'a')
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return 20;
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// If the target triple is something non-alpha, we don't match.
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if (!TT.empty()) return 0;
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if (M.getEndianness() == Module::LittleEndian &&
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M.getPointerSize() == Module::Pointer64)
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return 10; // Weak match
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else if (M.getEndianness() != Module::AnyEndianness ||
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M.getPointerSize() != Module::AnyPointerSize)
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return 0; // Match for some other target
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return getJITMatchQuality()/2;
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}
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unsigned AlphaTargetMachine::getJITMatchQuality() {
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#ifdef __alpha
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return 10;
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#else
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return 0;
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#endif
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}
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AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
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: DataLayout("e-f128:128:128"),
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FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
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JITInfo(*this),
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Subtarget(M, FS),
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TLInfo(*this) {
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setRelocationModel(Reloc::PIC_);
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}
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//===----------------------------------------------------------------------===//
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// Pass Pipeline Configuration
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//===----------------------------------------------------------------------===//
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bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
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PM.add(createAlphaISelDag(*this));
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return false;
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}
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bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
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// Must run branch selection immediately preceding the asm printer
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PM.add(createAlphaBranchSelectionPass());
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return false;
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}
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bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
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std::ostream &Out) {
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PM.add(createAlphaLLRPPass(*this));
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PM.add(createAlphaCodePrinterPass(Out, *this));
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return false;
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}
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bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
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bool DumpAsm, MachineCodeEmitter &MCE) {
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PM.add(createAlphaCodeEmitterPass(*this, MCE));
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if (DumpAsm)
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PM.add(createAlphaCodePrinterPass(*cerr.stream(), *this));
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return false;
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}
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bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
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bool Fast, bool DumpAsm,
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MachineCodeEmitter &MCE) {
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return addCodeEmitter(PM, Fast, DumpAsm, MCE);
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}
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