llvm-6502/lib
Chris Lattner c2c28fc24c Fix CodeGen/X86/inline-asm-x-scalar.ll:test4, by retaining regclass info
for tied register constraints.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37601 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-15 19:11:01 +00:00
..
Analysis Add a SCEV class and supporting code for sign-extend expressions. 2007-06-15 14:38:12 +00:00
Archive
AsmParser
Bitcode
CodeGen Fix CodeGen/X86/inline-asm-x-scalar.ll:test4, by retaining regclass info 2007-06-15 19:11:01 +00:00
Debugger
ExecutionEngine
Linker
Support Fix edge case. 2007-06-09 04:20:33 +00:00
System
Target Rename MVT::getVectorBaseType to MVT::getVectorElementType. 2007-06-14 22:58:02 +00:00
Transforms Use SCEVConstant::get instead of SCEVUnknown::get to create an 2007-06-15 18:00:55 +00:00
VMCore add a Constant::getAllOnesValue helper function, which works on integers 2007-06-15 06:10:53 +00:00
Makefile