llvm-6502/test/CodeGen
Colin LeMahieu c2d30aebf3 [Hexagon] Reverting r231699
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231703 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-09 21:19:02 +00:00
..
AArch64 [AArch64][LoadStoreOptimizer] Generate LDP + SXTW instead of LD[U]R + LD[U]RSW. 2015-03-06 22:42:10 +00:00
ARM Remove use of misched-bench from this test and replace it with 2015-03-07 01:39:06 +00:00
BPF
CPP
Generic
Hexagon [Hexagon] Reverting r231699 2015-03-09 21:19:02 +00:00
Inputs
Mips Add logical ops to Mips fast-isel 2015-03-09 16:28:10 +00:00
MSP430
NVPTX
PowerPC
R600 R600/SI: Limit SGPRs to 80 on Tonga and Iceland 2015-03-09 15:48:09 +00:00
SPARC
SystemZ
Thumb
Thumb2
WinEH
X86 Print jump tables before exception tables. 2015-03-09 18:29:12 +00:00
XCore