mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
5a70dd1d82
Similar to gep (r230786) and load (r230794) changes.
Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.
(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)
import fileinput
import sys
import re
rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)
def conv(match):
line = match.group(1)
line += match.group(4)
line += ", "
line += match.group(2)
return line
line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
sys.stdout.write(line[off:match.start()])
sys.stdout.write(conv(match))
off = match.end()
sys.stdout.write(line[off:])
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
259 lines
9.6 KiB
LLVM
259 lines
9.6 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=THUMB
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls -verify-machineinstrs | FileCheck %s --check-prefix=ARM-LONG
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -arm-long-calls -verify-machineinstrs | FileCheck %s --check-prefix=ARM-LONG
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-LONG
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; Note that some of these tests assume that relocations are either
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; movw/movt or constant pool loads. Different platforms will select
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; different approaches.
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@message1 = global [60 x i8] c"The LLVM Compiler Infrastructure\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", align 1
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@temp = common global [60 x i8] zeroinitializer, align 1
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define void @t1() nounwind ssp {
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; ARM-LABEL: t1:
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; ARM: {{(movw r0, :lower16:_?message1)|(ldr r0, .LCPI)}}
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; ARM: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
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; ARM: add r0, r0, #5
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; ARM: movw r1, #64
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; ARM: movw r2, #10
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; ARM: and r1, r1, #255
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; ARM: bl {{_?}}memset
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; ARM-LONG-LABEL: t1:
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; ARM-LONG: {{(movw r3, :lower16:L_memset\$non_lazy_ptr)|(ldr r3, .LCPI)}}
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; ARM-LONG: {{(movt r3, :upper16:L_memset\$non_lazy_ptr)?}}
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; ARM-LONG: ldr r3, [r3]
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; ARM-LONG: blx r3
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; THUMB-LABEL: t1:
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; THUMB: {{(movw r0, :lower16:_?message1)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
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; THUMB: adds r0, #5
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; THUMB: movs r1, #64
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; THUMB: movs r2, #10
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; THUMB: and r1, r1, #255
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; THUMB: bl {{_?}}memset
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; THUMB-LONG-LABEL: t1:
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; THUMB-LONG: movw r3, :lower16:L_memset$non_lazy_ptr
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; THUMB-LONG: movt r3, :upper16:L_memset$non_lazy_ptr
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; THUMB-LONG: ldr r3, [r3]
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; THUMB-LONG: blx r3
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call void @llvm.memset.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @message1, i32 0, i32 5), i8 64, i32 10, i32 4, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
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define void @t2() nounwind ssp {
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; ARM-LABEL: t2:
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; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM: ldr r0, [r0]
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; ARM: add r1, r0, #4
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; ARM: add r0, r0, #16
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; ARM: movw r2, #17
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; ARM: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
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; ARM: mov r0, r1
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; ARM: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
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; ARM: bl {{_?}}memcpy
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; ARM-LONG-LABEL: t2:
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; ARM-LONG: {{(movw r3, :lower16:L_memcpy\$non_lazy_ptr)|(ldr r3, .LCPI)}}
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; ARM-LONG: {{(movt r3, :upper16:L_memcpy\$non_lazy_ptr)?}}
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; ARM-LONG: ldr r3, [r3]
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; ARM-LONG: blx r3
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; THUMB-LABEL: t2:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: adds r1, r0, #4
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; THUMB: adds r0, #16
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; THUMB: movs r2, #17
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; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
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; THUMB: mov r0, r1
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; THUMB: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
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; THUMB: bl {{_?}}memcpy
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; THUMB-LONG-LABEL: t2:
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; THUMB-LONG: movw r3, :lower16:L_memcpy$non_lazy_ptr
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; THUMB-LONG: movt r3, :upper16:L_memcpy$non_lazy_ptr
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; THUMB-LONG: ldr r3, [r3]
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; THUMB-LONG: blx r3
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 17, i32 4, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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define void @t3() nounwind ssp {
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; ARM-LABEL: t3:
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; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM: ldr r0, [r0]
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; ARM: add r1, r0, #4
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; ARM: add r0, r0, #16
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; ARM: movw r2, #10
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; ARM: mov r0, r1
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; ARM: bl {{_?}}memmove
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; ARM-LONG-LABEL: t3:
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; ARM-LONG: {{(movw r3, :lower16:L_memmove\$non_lazy_ptr)|(ldr r3, .LCPI)}}
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; ARM-LONG: {{(movt r3, :upper16:L_memmove\$non_lazy_ptr)?}}
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; ARM-LONG: ldr r3, [r3]
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; ARM-LONG: blx r3
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; THUMB-LABEL: t3:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: adds r1, r0, #4
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; THUMB: adds r0, #16
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; THUMB: movs r2, #10
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; THUMB: str r0, [sp[[SLOT:[, #0-9]*]]] @ 4-byte Spill
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; THUMB: mov r0, r1
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; THUMB: ldr r1, [sp[[SLOT]]] @ 4-byte Reload
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; THUMB: bl {{_?}}memmove
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; THUMB-LONG-LABEL: t3:
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; THUMB-LONG: movw r3, :lower16:L_memmove$non_lazy_ptr
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; THUMB-LONG: movt r3, :upper16:L_memmove$non_lazy_ptr
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; THUMB-LONG: ldr r3, [r3]
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; THUMB-LONG: blx r3
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call void @llvm.memmove.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false)
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ret void
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}
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define void @t4() nounwind ssp {
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; ARM-LABEL: t4:
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; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM: ldr r0, [r0]
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; ARM: ldr r1, [r0, #16]
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; ARM: str r1, [r0, #4]
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; ARM: ldr r1, [r0, #20]
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; ARM: str r1, [r0, #8]
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; ARM: ldrh r1, [r0, #24]
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; ARM: strh r1, [r0, #12]
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; ARM: bx lr
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; THUMB-LABEL: t4:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: ldr r1, [r0, #16]
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; THUMB: str r1, [r0, #4]
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; THUMB: ldr r1, [r0, #20]
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; THUMB: str r1, [r0, #8]
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; THUMB: ldrh r1, [r0, #24]
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; THUMB: strh r1, [r0, #12]
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; THUMB: bx lr
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i32 4, i1 false)
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ret void
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}
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declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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define void @t5() nounwind ssp {
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; ARM-LABEL: t5:
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; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM: ldr r0, [r0]
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; ARM: ldrh r1, [r0, #16]
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; ARM: strh r1, [r0, #4]
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; ARM: ldrh r1, [r0, #18]
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; ARM: strh r1, [r0, #6]
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; ARM: ldrh r1, [r0, #20]
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; ARM: strh r1, [r0, #8]
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; ARM: ldrh r1, [r0, #22]
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; ARM: strh r1, [r0, #10]
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; ARM: ldrh r1, [r0, #24]
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; ARM: strh r1, [r0, #12]
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; ARM: bx lr
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; THUMB-LABEL: t5:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: ldrh r1, [r0, #16]
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; THUMB: strh r1, [r0, #4]
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; THUMB: ldrh r1, [r0, #18]
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; THUMB: strh r1, [r0, #6]
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; THUMB: ldrh r1, [r0, #20]
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; THUMB: strh r1, [r0, #8]
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; THUMB: ldrh r1, [r0, #22]
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; THUMB: strh r1, [r0, #10]
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; THUMB: ldrh r1, [r0, #24]
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; THUMB: strh r1, [r0, #12]
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; THUMB: bx lr
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i32 2, i1 false)
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ret void
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}
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define void @t6() nounwind ssp {
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; ARM-LABEL: t6:
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; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
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; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; ARM: ldr r0, [r0]
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; ARM: ldrb r1, [r0, #16]
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; ARM: strb r1, [r0, #4]
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; ARM: ldrb r1, [r0, #17]
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; ARM: strb r1, [r0, #5]
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; ARM: ldrb r1, [r0, #18]
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; ARM: strb r1, [r0, #6]
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; ARM: ldrb r1, [r0, #19]
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; ARM: strb r1, [r0, #7]
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; ARM: ldrb r1, [r0, #20]
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; ARM: strb r1, [r0, #8]
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; ARM: ldrb r1, [r0, #21]
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; ARM: strb r1, [r0, #9]
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; ARM: ldrb r1, [r0, #22]
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; ARM: strb r1, [r0, #10]
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; ARM: ldrb r1, [r0, #23]
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; ARM: strb r1, [r0, #11]
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; ARM: ldrb r1, [r0, #24]
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; ARM: strb r1, [r0, #12]
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; ARM: ldrb r1, [r0, #25]
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; ARM: strb r1, [r0, #13]
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; ARM: bx lr
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; THUMB-LABEL: t6:
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; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
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; THUMB: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
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; THUMB: ldr r0, [r0]
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; THUMB: ldrb r1, [r0, #16]
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; THUMB: strb r1, [r0, #4]
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; THUMB: ldrb r1, [r0, #17]
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; THUMB: strb r1, [r0, #5]
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; THUMB: ldrb r1, [r0, #18]
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; THUMB: strb r1, [r0, #6]
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; THUMB: ldrb r1, [r0, #19]
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; THUMB: strb r1, [r0, #7]
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; THUMB: ldrb r1, [r0, #20]
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; THUMB: strb r1, [r0, #8]
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; THUMB: ldrb r1, [r0, #21]
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; THUMB: strb r1, [r0, #9]
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; THUMB: ldrb r1, [r0, #22]
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; THUMB: strb r1, [r0, #10]
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; THUMB: ldrb r1, [r0, #23]
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; THUMB: strb r1, [r0, #11]
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; THUMB: ldrb r1, [r0, #24]
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; THUMB: strb r1, [r0, #12]
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; THUMB: ldrb r1, [r0, #25]
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; THUMB: strb r1, [r0, #13]
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; THUMB: bx lr
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 10, i32 1, i1 false)
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ret void
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}
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; rdar://13202135
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define void @t7() nounwind ssp {
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; Just make sure this doesn't assert when we have an odd length and an alignment of 2.
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call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 4), i8* getelementptr inbounds ([60 x i8], [60 x i8]* @temp, i32 0, i32 16), i32 3, i32 2, i1 false)
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ret void
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}
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define i32 @t8(i32 %x) nounwind {
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entry:
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; ARM-LABEL: t8:
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; ARM-NOT: FastISel missed call: %expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
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; THUMB-LABEL: t8:
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; THUMB-NOT: FastISel missed call: %expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
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%expval = call i32 @llvm.expect.i32(i32 %x, i32 1)
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ret i32 %expval
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}
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declare i32 @llvm.expect.i32(i32, i32) nounwind readnone
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