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dd479e9769
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121584 91177308-0d34-0410-b5e6-96231b3b80d8
69 lines
2.3 KiB
C++
69 lines
2.3 KiB
C++
//===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements an allocation order for virtual registers.
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//
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// The preferred allocation order for a virtual register depends on allocation
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// hints and target hooks. The AllocationOrder class encapsulates all of that.
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//
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//===----------------------------------------------------------------------===//
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#include "AllocationOrder.h"
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#include "VirtRegMap.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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using namespace llvm;
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// Compare VirtRegMap::getRegAllocPref().
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AllocationOrder::AllocationOrder(unsigned VirtReg,
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const VirtRegMap &VRM,
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const BitVector &ReservedRegs)
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: Pos(0), Reserved(ReservedRegs) {
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const TargetRegisterClass *RC = VRM.getRegInfo().getRegClass(VirtReg);
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std::pair<unsigned, unsigned> HintPair =
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VRM.getRegInfo().getRegAllocationHint(VirtReg);
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// HintPair.second is a register, phys or virt.
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Hint = HintPair.second;
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// Translate to physreg, or 0 if not assigned yet.
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if (Hint && TargetRegisterInfo::isVirtualRegister(Hint))
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Hint = VRM.getPhys(Hint);
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// The remaining allocation order may depend on the hint.
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tie(Begin, End) = VRM.getTargetRegInfo()
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.getAllocationOrder(RC, HintPair.first, Hint, VRM.getMachineFunction());
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// Target-dependent hints require resolution.
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if (HintPair.first)
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Hint = VRM.getTargetRegInfo().ResolveRegAllocHint(HintPair.first, Hint,
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VRM.getMachineFunction());
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// The hint must be a valid physreg for allocation.
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if (Hint && (!TargetRegisterInfo::isPhysicalRegister(Hint) ||
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!RC->contains(Hint) || ReservedRegs.test(Hint)))
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Hint = 0;
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}
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unsigned AllocationOrder::next() {
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// First take the hint.
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if (!Pos) {
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Pos = Begin;
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if (Hint)
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return Hint;
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}
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// Then look at the order from TRI.
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while(Pos != End) {
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unsigned Reg = *Pos++;
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if (Reg != Hint && !Reserved.test(Reg))
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return Reg;
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}
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return 0;
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}
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