llvm-6502/test/CodeGen
Daniel Sanders 68138dc9a8 [mips][msa] Fix invalid generated code when lowering FrameIndex involving unaligned offsets.
Summary:
The MSA ld.[bhwd] and st.[bhwd] instructions scale the immediate by the
element size before use as an offset. The offset must therefore be a
multiple of the element size to be valid in these instructions. However,
an unaligned base address is valid in MSA.

This commit causes the compiler to emit valid code when the calculated
offset is not a multiple of the element size by accounting for the offset
using addiu and using a zero offset in the load/store.

Depends on D2338

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2339

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196777 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-09 12:47:12 +00:00
..
AArch64 [AArch64]Add missing pair intrinsics such as: 2013-12-09 03:51:42 +00:00
ARM ARM: fix folding of stack-adjustment (yet again). 2013-12-08 15:56:50 +00:00
CPP
Generic Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions." 2013-11-21 10:55:15 +00:00
Hexagon Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips [mips][msa] Fix invalid generated code when lowering FrameIndex involving unaligned offsets. 2013-12-09 12:47:12 +00:00
MSP430 Make sure SP is always aligned on a 2 byte boundary 2013-10-24 09:32:31 +00:00
NVPTX [NVPTX] Fix off-by-one error when creating the VT list for an SDNode 2013-12-05 12:58:00 +00:00
PowerPC Correct word hyphenations 2013-12-05 05:44:44 +00:00
R600 Add a RequireStructuredCFG Field to TargetMachine. 2013-12-07 01:49:19 +00:00
SPARC [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9. 2013-12-09 05:13:25 +00:00
SystemZ [SystemZ] Use LOAD AND TEST for comparisons with -0 2013-12-06 09:59:12 +00:00
Thumb Use FileCheck and expand the test a bit. 2013-11-27 19:22:14 +00:00
Thumb2 Add support for parsing ARM symbol variants on ELF targets 2013-12-04 22:43:20 +00:00
X86 Update AVX512 vector blend intrinsic names. 2013-12-06 13:35:35 +00:00
XCore XCore target: Make handling of large frames not dependent upon an FP. 2013-12-02 11:05:28 +00:00