Misha Brukman c3cd8afe96 * Set annul bit to be 0, because the Sparc backend currently does not use it. ... * Use the name of the predict field instead of just the const 1 in the Instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7592 91177308-0d34-0410-b5e6-96231b3b80d8		2003-08-05 14:34:38 +00:00
..
CBackend	Unbreak the CBE output	2003-07-31 17:47:24 +00:00
SparcV9	* Set annul bit to be 0, because the Sparc backend currently does not use it.	2003-08-05 14:34:38 +00:00
X86	This is the real fix for the previous register allocator problem.	2003-08-05 00:48:47 +00:00
Makefile	X86 target builds fine now	2002-11-20 20:17:03 +00:00
MRegisterInfo.cpp	Make it easier to debug by exposing a temporary	2003-08-03 13:49:25 +00:00
Target.td	Allow instructions to have a DAG pattern associated with them.	2003-08-04 21:07:37 +00:00
TargetData.cpp	Remove redundant const qualifiers from cast<> expressions	2003-07-23 15:30:06 +00:00
TargetInstrInfo.cpp	Nice tasty llc fixes. These should fix LLC for x86 for everything in	2003-06-27 00:00:48 +00:00
TargetMachine.cpp	The promotion rules are the same for all targets, they are set by the C standard.	2003-04-26 19:47:36 +00:00
TargetSchedInfo.cpp	Reformatted code to match the prevalent LLVM style; fit code into 80 columns.	2003-08-05 00:02:06 +00:00