mirror of
https://github.com/c64scene-ar/llvm-6502.git
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26d628d6ce
Summary: Currently fast-isel-abort will only abort for regular instructions, and just warn for function calls, terminators, function arguments. There is already fast-isel-abort-args but nothing for calls and terminators. This change turns the fast-isel-abort options into an integer option, so that multiple levels of strictness can be defined. This will help no being surprised when the "abort" option indeed does not abort, and enables the possibility to write test that verifies that no intrinsics are forgotten by fast-isel. Reviewers: resistor, echristo Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D7941 From: Mehdi Amini <mehdi.amini@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230775 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
1.3 KiB
LLVM
59 lines
1.3 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -O0 -fast-isel-abort=1 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s
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; Sign-extend of i1 currently not supported by fast-isel
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;define signext i1 @ret0(i1 signext %a) nounwind uwtable ssp {
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;entry:
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; ret i1 %a
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;}
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define zeroext i1 @ret1(i1 signext %a) nounwind uwtable ssp {
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entry:
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; CHECK: ret1
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; CHECK: and r0, r0, #1
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; CHECK: bx lr
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ret i1 %a
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}
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define signext i8 @ret2(i8 signext %a) nounwind uwtable ssp {
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entry:
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; CHECK: ret2
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; CHECK: sxtb r0, r0
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; CHECK: bx lr
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ret i8 %a
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}
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define zeroext i8 @ret3(i8 signext %a) nounwind uwtable ssp {
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entry:
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; CHECK: ret3
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; CHECK: and r0, r0, #255
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; CHECK: bx lr
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ret i8 %a
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}
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define signext i16 @ret4(i16 signext %a) nounwind uwtable ssp {
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entry:
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; CHECK: ret4
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; CHECK: sxth r0, r0
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; CHECK: bx lr
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ret i16 %a
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}
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define zeroext i16 @ret5(i16 signext %a) nounwind uwtable ssp {
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entry:
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; CHECK: ret5
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; CHECK: uxth r0, r0
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; CHECK: bx lr
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ret i16 %a
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}
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define i16 @ret6(i16 %a) nounwind uwtable ssp {
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entry:
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; CHECK: ret6
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; CHECK-NOT: uxth
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; CHECK-NOT: sxth
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; CHECK: bx lr
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ret i16 %a
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}
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