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https://github.com/c64scene-ar/llvm-6502.git
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c58b8f0b65
This is the patch corresponding to review: http://reviews.llvm.org/D8406 It adds some missing instructions from ISA 2.06 to the PPC back end. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234546 91177308-0d34-0410-b5e6-96231b3b80d8
55 lines
1.5 KiB
LLVM
55 lines
1.5 KiB
LLVM
; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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; Function Attrs: nounwind
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define signext i32 @test1() #0 {
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entry:
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%0 = call i32 @llvm.ppc.divwe(i32 32, i32 16)
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ret i32 %0
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; CHECK: divwe 3, 4, 3
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.ppc.divwe(i32, i32) #1
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; Function Attrs: nounwind
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define signext i32 @test2() #0 {
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entry:
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%0 = call i32 @llvm.ppc.divweu(i32 32, i32 16)
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ret i32 %0
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; CHECK: divweu 3, 4, 3
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.ppc.divweu(i32, i32) #1
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; Function Attrs: nounwind
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define i64 @test3() #0 {
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entry:
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%0 = call i64 @llvm.ppc.divde(i64 32, i64 16)
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ret i64 %0
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; CHECK: divde 3, 4, 3
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}
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; Function Attrs: nounwind readnone
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declare i64 @llvm.ppc.divde(i64, i64) #1
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; Function Attrs: nounwind
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define i64 @test4() #0 {
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entry:
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%0 = call i64 @llvm.ppc.divdeu(i64 32, i64 16)
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ret i64 %0
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; CHECK: divdeu 3, 4, 3
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}
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; Function Attrs: nounwind readnone
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declare i64 @llvm.ppc.divdeu(i64, i64) #1
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attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nounwind readnone }
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!llvm.ident = !{!0}
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!0 = !{!"clang version 3.7.0 (trunk 231831) (llvm/trunk 231828:231843M)"}
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