llvm-6502/test/MC/Mips/mips32r5
Daniel Sanders 817cbdeae6 [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.
Summary:
Previously it (incorrectly) used GPR's.

Patch by Simon Dardis. A couple small corrections by myself.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10567


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240883 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-27 15:39:19 +00:00
..
abiflags.s
invalid-mips64r2.s
invalid.s
valid-xfail.s
valid.s [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0. 2015-06-27 15:39:19 +00:00