mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-22 07:32:48 +00:00
9409825b57
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201561 91177308-0d34-0410-b5e6-96231b3b80d8
364 lines
8.8 KiB
LLVM
364 lines
8.8 KiB
LLVM
; RUN: llc < %s -march=xcore | FileCheck %s
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; RUN: llc < %s -march=xcore -disable-fp-elim | FileCheck %s -check-prefix=CHECKFP
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declare i8* @llvm.frameaddress(i32) nounwind readnone
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declare i8* @llvm.returnaddress(i32) nounwind
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declare i8* @llvm.eh.dwarf.cfa(i32) nounwind
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declare void @llvm.eh.return.i32(i32, i8*) nounwind
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declare void @llvm.eh.unwind.init() nounwind
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define i8* @FA0() nounwind {
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entry:
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; CHECK-LABEL: FA0
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; CHECK: ldaw r0, sp[0]
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; CHECK-NEXT: retsp 0
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%0 = call i8* @llvm.frameaddress(i32 0)
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ret i8* %0
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}
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define i8* @FA1() nounwind {
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entry:
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; CHECK-LABEL: FA1
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; CHECK: entsp 100
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; CHECK-NEXT: ldaw r0, sp[0]
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; CHECK-NEXT: retsp 100
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%0 = alloca [100 x i32]
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%1 = call i8* @llvm.frameaddress(i32 0)
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ret i8* %1
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}
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define i8* @RA0() nounwind {
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entry:
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; CHECK-LABEL: RA0
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; CHECK: stw lr, sp[0]
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; CHECK-NEXT: ldw r0, sp[0]
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; CHECK-NEXT: ldw lr, sp[0]
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; CHECK-NEXT: retsp 0
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%0 = call i8* @llvm.returnaddress(i32 0)
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ret i8* %0
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}
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define i8* @RA1() nounwind {
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entry:
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; CHECK-LABEL: RA1
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; CHECK: entsp 100
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; CHECK-NEXT: ldw r0, sp[100]
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; CHECK-NEXT: retsp 100
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%0 = alloca [100 x i32]
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%1 = call i8* @llvm.returnaddress(i32 0)
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ret i8* %1
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}
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; test FRAME_TO_ARGS_OFFSET lowering
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define i8* @FTAO0() nounwind {
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entry:
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; CHECK-LABEL: FTAO0
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; CHECK: ldc r0, 0
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; CHECK-NEXT: ldaw r1, sp[0]
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; CHECK-NEXT: add r0, r1, r0
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; CHECK-NEXT: retsp 0
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%0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
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ret i8* %0
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}
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define i8* @FTAO1() nounwind {
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entry:
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; CHECK-LABEL: FTAO1
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; CHECK: entsp 100
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; CHECK-NEXT: ldc r0, 400
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; CHECK-NEXT: ldaw r1, sp[0]
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; CHECK-NEXT: add r0, r1, r0
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; CHECK-NEXT: retsp 100
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%0 = alloca [100 x i32]
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%1 = call i8* @llvm.eh.dwarf.cfa(i32 0)
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ret i8* %1
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}
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define i8* @EH0(i32 %offset, i8* %handler) {
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entry:
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; CHECK-LABEL: EH0
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; CHECK: entsp 2
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; CHECK: .cfi_def_cfa_offset 8
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; CHECK: .cfi_offset 15, 0
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; CHECK: .cfi_offset 1, -8
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; CHECK: .cfi_offset 0, -4
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; CHECK: ldc r2, 8
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; CHECK-NEXT: ldaw r3, sp[0]
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; CHECK-NEXT: add r2, r3, r2
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; CHECK-NEXT: add r2, r2, r0
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; CHECK-NEXT: mov r3, r1
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; CHECK-NEXT: ldw r1, sp[0]
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; CHECK-NEXT: ldw r0, sp[1]
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; CHECK-NEXT: set sp, r2
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; CHECK-NEXT: bau r3
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call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
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unreachable
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}
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declare void @foo(...)
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define i8* @EH1(i32 %offset, i8* %handler) {
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entry:
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; CHECK-LABEL: EH1
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; CHECK: entsp 5
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; CHECK: .cfi_def_cfa_offset 20
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; CHECK: .cfi_offset 15, 0
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; CHECK: .cfi_offset 1, -16
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; CHECK: .cfi_offset 0, -12
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; CHECK: stw r4, sp[4]
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; CHECK: .cfi_offset 4, -4
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; CHECK: stw r5, sp[3]
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; CHECK: .cfi_offset 5, -8
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; CHECK: mov r4, r1
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; CHECK-NEXT: mov r5, r0
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; CHECK-NEXT: bl foo
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; CHECK-NEXT: ldc r0, 20
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; CHECK-NEXT: ldaw r1, sp[0]
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; CHECK-NEXT: add r0, r1, r0
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; CHECK-NEXT: add r2, r0, r5
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; CHECK-NEXT: mov r3, r4
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; CHECK-NEXT: ldw r5, sp[3]
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; CHECK-NEXT: ldw r4, sp[4]
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; CHECK-NEXT: ldw r1, sp[1]
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; CHECK-NEXT: ldw r0, sp[2]
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; CHECK-NEXT: set sp, r2
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; CHECK-NEXT: bau r3
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call void (...)* @foo()
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call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
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unreachable
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}
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@offset = external constant i32
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@handler = external constant i8
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define i8* @EH2(i32 %r0, i32 %r1, i32 %r2, i32 %r3) {
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entry:
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; CHECK-LABEL: EH2
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; CHECK: entsp 3
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; CHECK: bl foo
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; CHECK-NEXT: ldw r0, dp[offset]
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; CHECK-NEXT: ldc r1, 12
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; CHECK-NEXT: ldaw r2, sp[0]
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; CHECK-NEXT: add r1, r2, r1
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; CHECK-NEXT: add r2, r1, r0
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; CHECK-NEXT: ldaw r3, dp[handler]
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; CHECK-NEXT: ldw r1, sp[1]
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; CHECK-NEXT: ldw r0, sp[2]
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; CHECK-NEXT: set sp, r2
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; CHECK-NEXT: bau r3
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call void (...)* @foo()
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%0 = load i32* @offset
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call void @llvm.eh.return.i32(i32 %0, i8* @handler)
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unreachable
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}
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; FP: spill FP+SR+R0:1+R4:9 = entsp 2+2+6
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; But we dont actually spill or restore R0:1
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; CHECKFP-LABEL: Unwind0:
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; CHECKFP: entsp 10
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; CHECKFP: stw r10, sp[1]
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; CHECKFP: ldaw r10, sp[0]
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; CHECKFP: stw r4, r10[9]
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; CHECKFP: stw r5, r10[8]
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; CHECKFP: stw r6, r10[7]
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; CHECKFP: stw r7, r10[6]
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; CHECKFP: stw r8, r10[5]
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; CHECKFP: stw r9, r10[4]
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; CHECKFP: ldw r9, r10[4]
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; CHECKFP: ldw r8, r10[5]
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; CHECKFP: ldw r7, r10[6]
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; CHECKFP: ldw r6, r10[7]
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; CHECKFP: ldw r5, r10[8]
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; CHECKFP: ldw r4, r10[9]
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; CHECKFP: set sp, r10
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; CHECKFP: ldw r10, sp[1]
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; CHECKFP: retsp 10
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;
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; !FP: spill R0:1+R4:10 = entsp 2+7
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; But we dont actually spill or restore R0:1
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; CHECK-LABEL: Unwind0:
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; CHECK: entsp 9
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; CHECK: stw r4, sp[8]
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; CHECK: stw r5, sp[7]
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; CHECK: stw r6, sp[6]
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; CHECK: stw r7, sp[5]
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; CHECK: stw r8, sp[4]
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; CHECK: stw r9, sp[3]
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; CHECK: stw r10, sp[2]
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; CHECK: ldw r10, sp[2]
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; CHECK: ldw r9, sp[3]
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; CHECK: ldw r8, sp[4]
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; CHECK: ldw r7, sp[5]
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; CHECK: ldw r6, sp[6]
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; CHECK: ldw r5, sp[7]
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; CHECK: ldw r4, sp[8]
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; CHECK: retsp 9
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define void @Unwind0() {
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call void @llvm.eh.unwind.init()
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ret void
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}
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; FP: spill FP+SR+R0:1+R4:9+LR = entsp 2+2+6 + extsp 1
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; But we dont actually spill or restore R0:1
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; CHECKFP-LABEL: Unwind1:
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; CHECKFP: entsp 10
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; CHECKFP: stw r10, sp[1]
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; CHECKFP: ldaw r10, sp[0]
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; CHECKFP: stw r4, r10[9]
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; CHECKFP: stw r5, r10[8]
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; CHECKFP: stw r6, r10[7]
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; CHECKFP: stw r7, r10[6]
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; CHECKFP: stw r8, r10[5]
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; CHECKFP: stw r9, r10[4]
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; CHECKFP: extsp 1
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; CHECKFP: bl foo
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; CHECKFP: ldaw sp, sp[1]
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; CHECKFP: ldw r9, r10[4]
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; CHECKFP: ldw r8, r10[5]
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; CHECKFP: ldw r7, r10[6]
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; CHECKFP: ldw r6, r10[7]
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; CHECKFP: ldw r5, r10[8]
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; CHECKFP: ldw r4, r10[9]
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; CHECKFP: set sp, r10
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; CHECKFP: ldw r10, sp[1]
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; CHECKFP: retsp 10
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;
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; !FP: spill R0:1+R4:10+LR = entsp 2+7+1
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; But we dont actually spill or restore R0:1
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; CHECK-LABEL: Unwind1:
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; CHECK: entsp 10
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; CHECK: stw r4, sp[9]
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; CHECK: stw r5, sp[8]
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; CHECK: stw r6, sp[7]
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; CHECK: stw r7, sp[6]
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; CHECK: stw r8, sp[5]
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; CHECK: stw r9, sp[4]
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; CHECK: stw r10, sp[3]
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; CHECK: bl foo
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; CHECK: ldw r10, sp[3]
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; CHECK: ldw r9, sp[4]
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; CHECK: ldw r8, sp[5]
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; CHECK: ldw r7, sp[6]
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; CHECK: ldw r6, sp[7]
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; CHECK: ldw r5, sp[8]
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; CHECK: ldw r4, sp[9]
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; CHECK: retsp 10
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define void @Unwind1() {
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call void (...)* @foo()
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call void @llvm.eh.unwind.init()
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ret void
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}
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; FP: spill FP+SR+R0:1+R4:9 = entsp 2+2+6
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; We dont spill R0:1
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; We only restore R0:1 during eh.return
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; CHECKFP-LABEL: UnwindEH:
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; CHECKFP: entsp 10
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; CHECKFP: .cfi_def_cfa_offset 40
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; CHECKFP: .cfi_offset 15, 0
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; CHECKFP: stw r10, sp[1]
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; CHECKFP: .cfi_offset 10, -36
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; CHECKFP: ldaw r10, sp[0]
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; CHECKFP: .cfi_def_cfa_register 10
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; CHECKFP: .cfi_offset 1, -32
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; CHECKFP: .cfi_offset 0, -28
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; CHECKFP: stw r4, r10[9]
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; CHECKFP: .cfi_offset 4, -4
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; CHECKFP: stw r5, r10[8]
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; CHECKFP: .cfi_offset 5, -8
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; CHECKFP: stw r6, r10[7]
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; CHECKFP: .cfi_offset 6, -12
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; CHECKFP: stw r7, r10[6]
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; CHECKFP: .cfi_offset 7, -16
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; CHECKFP: stw r8, r10[5]
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; CHECKFP: .cfi_offset 8, -20
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; CHECKFP: stw r9, r10[4]
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; CHECKFP: .cfi_offset 9, -24
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; CHECKFP: bt r0, .LBB{{[0-9_]+}}
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; CHECKFP: ldw r9, r10[4]
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; CHECKFP-NEXT: ldw r8, r10[5]
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; CHECKFP-NEXT: ldw r7, r10[6]
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; CHECKFP-NEXT: ldw r6, r10[7]
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; CHECKFP-NEXT: ldw r5, r10[8]
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; CHECKFP-NEXT: ldw r4, r10[9]
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; CHECKFP-NEXT: set sp, r10
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; CHECKFP-NEXT: ldw r10, sp[1]
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; CHECKFP-NEXT: retsp 10
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; CHECKFP: .LBB{{[0-9_]+}}
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; CHECKFP-NEXT: ldc r2, 40
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; CHECKFP-NEXT: add r2, r10, r2
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; CHECKFP-NEXT: add r0, r2, r0
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; CHECKFP-NEXT: mov r3, r1
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; CHECKFP-NEXT: mov r2, r0
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; CHECKFP-NEXT: ldw r9, r10[4]
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; CHECKFP-NEXT: ldw r8, r10[5]
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; CHECKFP-NEXT: ldw r7, r10[6]
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; CHECKFP-NEXT: ldw r6, r10[7]
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; CHECKFP-NEXT: ldw r5, r10[8]
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; CHECKFP-NEXT: ldw r4, r10[9]
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; CHECKFP-NEXT: ldw r1, sp[2]
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; CHECKFP-NEXT: ldw r0, sp[3]
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; CHECKFP-NEXT: set sp, r2
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; CHECKFP-NEXT: bau r3
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;
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; !FP: spill R0:1+R4:10 = entsp 2+7
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; We dont spill R0:1
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; We only restore R0:1 during eh.return
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; CHECK-LABEL: UnwindEH:
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; CHECK: entsp 9
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; CHECK: .cfi_def_cfa_offset 36
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; CHECK: .cfi_offset 15, 0
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; CHECK: .cfi_offset 1, -36
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; CHECK: .cfi_offset 0, -32
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; CHECK: stw r4, sp[8]
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; CHECK: .cfi_offset 4, -4
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; CHECK: stw r5, sp[7]
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; CHECK: .cfi_offset 5, -8
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; CHECK: stw r6, sp[6]
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; CHECK: .cfi_offset 6, -12
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; CHECK: stw r7, sp[5]
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; CHECK: .cfi_offset 7, -16
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; CHECK: stw r8, sp[4]
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; CHECK: .cfi_offset 8, -20
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; CHECK: stw r9, sp[3]
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; CHECK: .cfi_offset 9, -24
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; CHECK: stw r10, sp[2]
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; CHECK: .cfi_offset 10, -28
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; CHECK: bt r0, .LBB{{[0-9_]+}}
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; CHECK: ldw r10, sp[2]
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; CHECK-NEXT: ldw r9, sp[3]
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; CHECK-NEXT: ldw r8, sp[4]
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; CHECK-NEXT: ldw r7, sp[5]
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; CHECK-NEXT: ldw r6, sp[6]
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; CHECK-NEXT: ldw r5, sp[7]
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; CHECK-NEXT: ldw r4, sp[8]
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; CHECK-NEXT: retsp 9
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; CHECK: .LBB{{[0-9_]+}}
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; CHECK-NEXT: ldc r2, 36
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; CHECK-NEXT: ldaw r3, sp[0]
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; CHECK-NEXT: add r2, r3, r2
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; CHECK-NEXT: add r0, r2, r0
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; CHECK-NEXT: mov r3, r1
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; CHECK-NEXT: mov r2, r0
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; CHECK-NEXT: ldw r10, sp[2]
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; CHECK-NEXT: ldw r9, sp[3]
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; CHECK-NEXT: ldw r8, sp[4]
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; CHECK-NEXT: ldw r7, sp[5]
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; CHECK-NEXT: ldw r6, sp[6]
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; CHECK-NEXT: ldw r5, sp[7]
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; CHECK-NEXT: ldw r4, sp[8]
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; CHECK-NEXT: ldw r1, sp[0]
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; CHECK-NEXT: ldw r0, sp[1]
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; CHECK-NEXT: set sp, r2
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; CHECK-NEXT: bau r3
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define void @UnwindEH(i32 %offset, i8* %handler) {
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call void @llvm.eh.unwind.init()
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%cmp = icmp eq i32 %offset, 0
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br i1 %cmp, label %normal, label %eh
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eh:
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call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
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unreachable
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normal:
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ret void
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}
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