llvm-6502/test/CodeGen
Juergen Ributzka c40dab2069 [AArch64] Fix miscompile of sdiv-by-power-of-2.
When the constant divisor was larger than 32bits, then the optimized code
generated for the AArch64 backend would emit the wrong code, because the shift
was defined as a shift of a 32bit constant '(1<<Lg2(divisor))' and we would
loose the upper 32bits.

This fixes rdar://problem/18678801.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219934 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-16 16:41:15 +00:00
..
AArch64 [AArch64] Fix miscompile of sdiv-by-power-of-2. 2014-10-16 16:41:15 +00:00
ARM ARM: remove ARM/Thumb distinction for preferred alignment. 2014-10-14 22:12:17 +00:00
CPP
Generic Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Hexagon Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Inputs Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Mips [mips] Account for endianess when expanding BuildPairF64/ExtractElementF64 nodes. 2014-10-16 15:41:51 +00:00
MSP430 Drop the W postfix on the 16-bit registers. 2014-09-10 06:58:14 +00:00
NVPTX [MachineSink] Use the real post dominator tree 2014-10-15 03:27:43 +00:00
PowerPC Improve sqrt estimate algorithm (fast-math) 2014-10-09 21:26:35 +00:00
R600 R600/SI: Fix bug where immediates were being used in DS addr operands 2014-10-15 21:08:59 +00:00
SPARC Add back tests for empty function in SPARC and PowerPC. 2014-09-15 22:11:07 +00:00
SystemZ
Thumb Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00
Thumb2 [ARM] Allow selecting VRINT[APMXZR] and VCVT[BT] instructions for FPv5 2014-10-01 13:13:18 +00:00
X86 [AVX512] Add DQ subvector inserts 2014-10-15 23:42:17 +00:00
XCore Revert "Revert "DI: Fold constant arguments into a single MDString"" 2014-10-03 20:01:09 +00:00