mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-30 21:29:28 +00:00
The .b8 operations in PTX are far more limiting than I first thought. The mov operation isn't even supported, so there's no way of converting a .pred value into a .b8 without going via .b16, which is not sensible. An improved implementation needs to use the fact that loads and stores automatically extend and truncate to implement support for EXTLOAD and TRUNCSTORE in order to correctly support boolean values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133873 91177308-0d34-0410-b5e6-96231b3b80d8
556 lines
15 KiB
TableGen
556 lines
15 KiB
TableGen
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//===- PTXRegisterInfo.td - PTX Register defs ----------------*- tblgen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Declarations that describe the PTX register file
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//===----------------------------------------------------------------------===//
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class PTXReg<string n> : Register<n> {
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let Namespace = "PTX";
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}
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//===----------------------------------------------------------------------===//
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// Registers
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//===----------------------------------------------------------------------===//
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///===- Predicate Registers -----------------------------------------------===//
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def P0 : PTXReg<"p0">;
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def P1 : PTXReg<"p1">;
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def P2 : PTXReg<"p2">;
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def P3 : PTXReg<"p3">;
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def P4 : PTXReg<"p4">;
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def P5 : PTXReg<"p5">;
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def P6 : PTXReg<"p6">;
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def P7 : PTXReg<"p7">;
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def P8 : PTXReg<"p8">;
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def P9 : PTXReg<"p9">;
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def P10 : PTXReg<"p10">;
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def P11 : PTXReg<"p11">;
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def P12 : PTXReg<"p12">;
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def P13 : PTXReg<"p13">;
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def P14 : PTXReg<"p14">;
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def P15 : PTXReg<"p15">;
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def P16 : PTXReg<"p16">;
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def P17 : PTXReg<"p17">;
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def P18 : PTXReg<"p18">;
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def P19 : PTXReg<"p19">;
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def P20 : PTXReg<"p20">;
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def P21 : PTXReg<"p21">;
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def P22 : PTXReg<"p22">;
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def P23 : PTXReg<"p23">;
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def P24 : PTXReg<"p24">;
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def P25 : PTXReg<"p25">;
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def P26 : PTXReg<"p26">;
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def P27 : PTXReg<"p27">;
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def P28 : PTXReg<"p28">;
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def P29 : PTXReg<"p29">;
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def P30 : PTXReg<"p30">;
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def P31 : PTXReg<"p31">;
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def P32 : PTXReg<"p32">;
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def P33 : PTXReg<"p33">;
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def P34 : PTXReg<"p34">;
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def P35 : PTXReg<"p35">;
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def P36 : PTXReg<"p36">;
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def P37 : PTXReg<"p37">;
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def P38 : PTXReg<"p38">;
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def P39 : PTXReg<"p39">;
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def P40 : PTXReg<"p40">;
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def P41 : PTXReg<"p41">;
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def P42 : PTXReg<"p42">;
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def P43 : PTXReg<"p43">;
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def P44 : PTXReg<"p44">;
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def P45 : PTXReg<"p45">;
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def P46 : PTXReg<"p46">;
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def P47 : PTXReg<"p47">;
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def P48 : PTXReg<"p48">;
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def P49 : PTXReg<"p49">;
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def P50 : PTXReg<"p50">;
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def P51 : PTXReg<"p51">;
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def P52 : PTXReg<"p52">;
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def P53 : PTXReg<"p53">;
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def P54 : PTXReg<"p54">;
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def P55 : PTXReg<"p55">;
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def P56 : PTXReg<"p56">;
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def P57 : PTXReg<"p57">;
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def P58 : PTXReg<"p58">;
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def P59 : PTXReg<"p59">;
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def P60 : PTXReg<"p60">;
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def P61 : PTXReg<"p61">;
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def P62 : PTXReg<"p62">;
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def P63 : PTXReg<"p63">;
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def P64 : PTXReg<"p64">;
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def P65 : PTXReg<"p65">;
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def P66 : PTXReg<"p66">;
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def P67 : PTXReg<"p67">;
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def P68 : PTXReg<"p68">;
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def P69 : PTXReg<"p69">;
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def P70 : PTXReg<"p70">;
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def P71 : PTXReg<"p71">;
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def P72 : PTXReg<"p72">;
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def P73 : PTXReg<"p73">;
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def P74 : PTXReg<"p74">;
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def P75 : PTXReg<"p75">;
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def P76 : PTXReg<"p76">;
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def P77 : PTXReg<"p77">;
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def P78 : PTXReg<"p78">;
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def P79 : PTXReg<"p79">;
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def P80 : PTXReg<"p80">;
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def P81 : PTXReg<"p81">;
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def P82 : PTXReg<"p82">;
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def P83 : PTXReg<"p83">;
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def P84 : PTXReg<"p84">;
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def P85 : PTXReg<"p85">;
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def P86 : PTXReg<"p86">;
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def P87 : PTXReg<"p87">;
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def P88 : PTXReg<"p88">;
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def P89 : PTXReg<"p89">;
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def P90 : PTXReg<"p90">;
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def P91 : PTXReg<"p91">;
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def P92 : PTXReg<"p92">;
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def P93 : PTXReg<"p93">;
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def P94 : PTXReg<"p94">;
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def P95 : PTXReg<"p95">;
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def P96 : PTXReg<"p96">;
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def P97 : PTXReg<"p97">;
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def P98 : PTXReg<"p98">;
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def P99 : PTXReg<"p99">;
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def P100 : PTXReg<"p100">;
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def P101 : PTXReg<"p101">;
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def P102 : PTXReg<"p102">;
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def P103 : PTXReg<"p103">;
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def P104 : PTXReg<"p104">;
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def P105 : PTXReg<"p105">;
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def P106 : PTXReg<"p106">;
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def P107 : PTXReg<"p107">;
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def P108 : PTXReg<"p108">;
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def P109 : PTXReg<"p109">;
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def P110 : PTXReg<"p110">;
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def P111 : PTXReg<"p111">;
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def P112 : PTXReg<"p112">;
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def P113 : PTXReg<"p113">;
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def P114 : PTXReg<"p114">;
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def P115 : PTXReg<"p115">;
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def P116 : PTXReg<"p116">;
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def P117 : PTXReg<"p117">;
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def P118 : PTXReg<"p118">;
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def P119 : PTXReg<"p119">;
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def P120 : PTXReg<"p120">;
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def P121 : PTXReg<"p121">;
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def P122 : PTXReg<"p122">;
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def P123 : PTXReg<"p123">;
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def P124 : PTXReg<"p124">;
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def P125 : PTXReg<"p125">;
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def P126 : PTXReg<"p126">;
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def P127 : PTXReg<"p127">;
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///===- 16-Bit Registers --------------------------------------------------===//
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def RH0 : PTXReg<"rh0">;
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def RH1 : PTXReg<"rh1">;
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def RH2 : PTXReg<"rh2">;
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def RH3 : PTXReg<"rh3">;
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def RH4 : PTXReg<"rh4">;
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def RH5 : PTXReg<"rh5">;
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def RH6 : PTXReg<"rh6">;
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def RH7 : PTXReg<"rh7">;
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def RH8 : PTXReg<"rh8">;
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def RH9 : PTXReg<"rh9">;
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def RH10 : PTXReg<"rh10">;
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def RH11 : PTXReg<"rh11">;
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def RH12 : PTXReg<"rh12">;
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def RH13 : PTXReg<"rh13">;
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def RH14 : PTXReg<"rh14">;
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def RH15 : PTXReg<"rh15">;
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def RH16 : PTXReg<"rh16">;
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def RH17 : PTXReg<"rh17">;
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def RH18 : PTXReg<"rh18">;
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def RH19 : PTXReg<"rh19">;
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def RH20 : PTXReg<"rh20">;
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def RH21 : PTXReg<"rh21">;
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def RH22 : PTXReg<"rh22">;
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def RH23 : PTXReg<"rh23">;
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def RH24 : PTXReg<"rh24">;
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def RH25 : PTXReg<"rh25">;
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def RH26 : PTXReg<"rh26">;
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def RH27 : PTXReg<"rh27">;
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def RH28 : PTXReg<"rh28">;
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def RH29 : PTXReg<"rh29">;
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def RH30 : PTXReg<"rh30">;
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def RH31 : PTXReg<"rh31">;
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def RH32 : PTXReg<"rh32">;
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def RH33 : PTXReg<"rh33">;
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def RH34 : PTXReg<"rh34">;
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def RH35 : PTXReg<"rh35">;
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def RH36 : PTXReg<"rh36">;
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def RH37 : PTXReg<"rh37">;
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def RH38 : PTXReg<"rh38">;
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def RH39 : PTXReg<"rh39">;
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def RH40 : PTXReg<"rh40">;
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def RH41 : PTXReg<"rh41">;
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def RH42 : PTXReg<"rh42">;
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def RH43 : PTXReg<"rh43">;
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def RH44 : PTXReg<"rh44">;
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def RH45 : PTXReg<"rh45">;
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def RH46 : PTXReg<"rh46">;
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def RH47 : PTXReg<"rh47">;
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def RH48 : PTXReg<"rh48">;
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def RH49 : PTXReg<"rh49">;
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def RH50 : PTXReg<"rh50">;
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def RH51 : PTXReg<"rh51">;
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def RH52 : PTXReg<"rh52">;
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def RH53 : PTXReg<"rh53">;
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def RH54 : PTXReg<"rh54">;
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def RH55 : PTXReg<"rh55">;
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def RH56 : PTXReg<"rh56">;
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def RH57 : PTXReg<"rh57">;
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def RH58 : PTXReg<"rh58">;
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def RH59 : PTXReg<"rh59">;
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def RH60 : PTXReg<"rh60">;
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def RH61 : PTXReg<"rh61">;
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def RH62 : PTXReg<"rh62">;
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def RH63 : PTXReg<"rh63">;
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def RH64 : PTXReg<"rh64">;
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def RH65 : PTXReg<"rh65">;
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def RH66 : PTXReg<"rh66">;
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def RH67 : PTXReg<"rh67">;
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def RH68 : PTXReg<"rh68">;
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def RH69 : PTXReg<"rh69">;
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def RH70 : PTXReg<"rh70">;
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def RH71 : PTXReg<"rh71">;
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def RH72 : PTXReg<"rh72">;
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def RH73 : PTXReg<"rh73">;
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def RH74 : PTXReg<"rh74">;
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def RH75 : PTXReg<"rh75">;
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def RH76 : PTXReg<"rh76">;
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def RH77 : PTXReg<"rh77">;
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def RH78 : PTXReg<"rh78">;
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def RH79 : PTXReg<"rh79">;
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def RH80 : PTXReg<"rh80">;
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def RH81 : PTXReg<"rh81">;
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def RH82 : PTXReg<"rh82">;
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def RH83 : PTXReg<"rh83">;
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def RH84 : PTXReg<"rh84">;
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def RH85 : PTXReg<"rh85">;
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def RH86 : PTXReg<"rh86">;
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def RH87 : PTXReg<"rh87">;
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def RH88 : PTXReg<"rh88">;
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def RH89 : PTXReg<"rh89">;
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def RH90 : PTXReg<"rh90">;
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def RH91 : PTXReg<"rh91">;
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def RH92 : PTXReg<"rh92">;
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def RH93 : PTXReg<"rh93">;
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def RH94 : PTXReg<"rh94">;
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def RH95 : PTXReg<"rh95">;
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def RH96 : PTXReg<"rh96">;
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def RH97 : PTXReg<"rh97">;
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def RH98 : PTXReg<"rh98">;
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def RH99 : PTXReg<"rh99">;
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def RH100 : PTXReg<"rh100">;
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def RH101 : PTXReg<"rh101">;
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def RH102 : PTXReg<"rh102">;
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def RH103 : PTXReg<"rh103">;
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def RH104 : PTXReg<"rh104">;
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def RH105 : PTXReg<"rh105">;
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def RH106 : PTXReg<"rh106">;
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def RH107 : PTXReg<"rh107">;
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def RH108 : PTXReg<"rh108">;
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def RH109 : PTXReg<"rh109">;
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def RH110 : PTXReg<"rh110">;
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def RH111 : PTXReg<"rh111">;
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def RH112 : PTXReg<"rh112">;
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def RH113 : PTXReg<"rh113">;
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def RH114 : PTXReg<"rh114">;
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def RH115 : PTXReg<"rh115">;
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def RH116 : PTXReg<"rh116">;
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def RH117 : PTXReg<"rh117">;
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def RH118 : PTXReg<"rh118">;
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def RH119 : PTXReg<"rh119">;
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def RH120 : PTXReg<"rh120">;
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def RH121 : PTXReg<"rh121">;
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def RH122 : PTXReg<"rh122">;
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def RH123 : PTXReg<"rh123">;
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def RH124 : PTXReg<"rh124">;
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def RH125 : PTXReg<"rh125">;
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def RH126 : PTXReg<"rh126">;
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def RH127 : PTXReg<"rh127">;
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///===- 32-Bit Registers --------------------------------------------------===//
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def R0 : PTXReg<"r0">;
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def R1 : PTXReg<"r1">;
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def R2 : PTXReg<"r2">;
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def R3 : PTXReg<"r3">;
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def R4 : PTXReg<"r4">;
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def R5 : PTXReg<"r5">;
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def R6 : PTXReg<"r6">;
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def R7 : PTXReg<"r7">;
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def R8 : PTXReg<"r8">;
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def R9 : PTXReg<"r9">;
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def R10 : PTXReg<"r10">;
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def R11 : PTXReg<"r11">;
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def R12 : PTXReg<"r12">;
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def R13 : PTXReg<"r13">;
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def R14 : PTXReg<"r14">;
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def R15 : PTXReg<"r15">;
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def R16 : PTXReg<"r16">;
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def R17 : PTXReg<"r17">;
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def R18 : PTXReg<"r18">;
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def R19 : PTXReg<"r19">;
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def R20 : PTXReg<"r20">;
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def R21 : PTXReg<"r21">;
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def R22 : PTXReg<"r22">;
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def R23 : PTXReg<"r23">;
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def R24 : PTXReg<"r24">;
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def R25 : PTXReg<"r25">;
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def R26 : PTXReg<"r26">;
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def R27 : PTXReg<"r27">;
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def R28 : PTXReg<"r28">;
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def R29 : PTXReg<"r29">;
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def R30 : PTXReg<"r30">;
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def R31 : PTXReg<"r31">;
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def R32 : PTXReg<"r32">;
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def R33 : PTXReg<"r33">;
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def R34 : PTXReg<"r34">;
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def R35 : PTXReg<"r35">;
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def R36 : PTXReg<"r36">;
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def R37 : PTXReg<"r37">;
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def R38 : PTXReg<"r38">;
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def R39 : PTXReg<"r39">;
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def R40 : PTXReg<"r40">;
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def R41 : PTXReg<"r41">;
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def R42 : PTXReg<"r42">;
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def R43 : PTXReg<"r43">;
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def R44 : PTXReg<"r44">;
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def R45 : PTXReg<"r45">;
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def R46 : PTXReg<"r46">;
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def R47 : PTXReg<"r47">;
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def R48 : PTXReg<"r48">;
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def R49 : PTXReg<"r49">;
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def R50 : PTXReg<"r50">;
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def R51 : PTXReg<"r51">;
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def R52 : PTXReg<"r52">;
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def R53 : PTXReg<"r53">;
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def R54 : PTXReg<"r54">;
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def R55 : PTXReg<"r55">;
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def R56 : PTXReg<"r56">;
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def R57 : PTXReg<"r57">;
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def R58 : PTXReg<"r58">;
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def R59 : PTXReg<"r59">;
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def R60 : PTXReg<"r60">;
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def R61 : PTXReg<"r61">;
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def R62 : PTXReg<"r62">;
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def R63 : PTXReg<"r63">;
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def R64 : PTXReg<"r64">;
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def R65 : PTXReg<"r65">;
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def R66 : PTXReg<"r66">;
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def R67 : PTXReg<"r67">;
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def R68 : PTXReg<"r68">;
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def R69 : PTXReg<"r69">;
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def R70 : PTXReg<"r70">;
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def R71 : PTXReg<"r71">;
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def R72 : PTXReg<"r72">;
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def R73 : PTXReg<"r73">;
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def R74 : PTXReg<"r74">;
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def R75 : PTXReg<"r75">;
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def R76 : PTXReg<"r76">;
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def R77 : PTXReg<"r77">;
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def R78 : PTXReg<"r78">;
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def R79 : PTXReg<"r79">;
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def R80 : PTXReg<"r80">;
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def R81 : PTXReg<"r81">;
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def R82 : PTXReg<"r82">;
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def R83 : PTXReg<"r83">;
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def R84 : PTXReg<"r84">;
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def R85 : PTXReg<"r85">;
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def R86 : PTXReg<"r86">;
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def R87 : PTXReg<"r87">;
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def R88 : PTXReg<"r88">;
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def R89 : PTXReg<"r89">;
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def R90 : PTXReg<"r90">;
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def R91 : PTXReg<"r91">;
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def R92 : PTXReg<"r92">;
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def R93 : PTXReg<"r93">;
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def R94 : PTXReg<"r94">;
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def R95 : PTXReg<"r95">;
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def R96 : PTXReg<"r96">;
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def R97 : PTXReg<"r97">;
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def R98 : PTXReg<"r98">;
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def R99 : PTXReg<"r99">;
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def R100 : PTXReg<"r100">;
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def R101 : PTXReg<"r101">;
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def R102 : PTXReg<"r102">;
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def R103 : PTXReg<"r103">;
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def R104 : PTXReg<"r104">;
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def R105 : PTXReg<"r105">;
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def R106 : PTXReg<"r106">;
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def R107 : PTXReg<"r107">;
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def R108 : PTXReg<"r108">;
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def R109 : PTXReg<"r109">;
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def R110 : PTXReg<"r110">;
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def R111 : PTXReg<"r111">;
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def R112 : PTXReg<"r112">;
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def R113 : PTXReg<"r113">;
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def R114 : PTXReg<"r114">;
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def R115 : PTXReg<"r115">;
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def R116 : PTXReg<"r116">;
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def R117 : PTXReg<"r117">;
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def R118 : PTXReg<"r118">;
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def R119 : PTXReg<"r119">;
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def R120 : PTXReg<"r120">;
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def R121 : PTXReg<"r121">;
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def R122 : PTXReg<"r122">;
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def R123 : PTXReg<"r123">;
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def R124 : PTXReg<"r124">;
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def R125 : PTXReg<"r125">;
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def R126 : PTXReg<"r126">;
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def R127 : PTXReg<"r127">;
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///===- 64-Bit Registers --------------------------------------------------===//
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def RD0 : PTXReg<"rd0">;
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def RD1 : PTXReg<"rd1">;
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def RD2 : PTXReg<"rd2">;
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def RD3 : PTXReg<"rd3">;
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def RD4 : PTXReg<"rd4">;
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def RD5 : PTXReg<"rd5">;
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def RD6 : PTXReg<"rd6">;
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def RD7 : PTXReg<"rd7">;
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def RD8 : PTXReg<"rd8">;
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def RD9 : PTXReg<"rd9">;
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def RD10 : PTXReg<"rd10">;
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def RD11 : PTXReg<"rd11">;
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def RD12 : PTXReg<"rd12">;
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def RD13 : PTXReg<"rd13">;
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def RD14 : PTXReg<"rd14">;
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def RD15 : PTXReg<"rd15">;
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def RD16 : PTXReg<"rd16">;
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def RD17 : PTXReg<"rd17">;
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def RD18 : PTXReg<"rd18">;
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def RD19 : PTXReg<"rd19">;
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def RD20 : PTXReg<"rd20">;
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def RD21 : PTXReg<"rd21">;
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def RD22 : PTXReg<"rd22">;
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def RD23 : PTXReg<"rd23">;
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def RD24 : PTXReg<"rd24">;
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def RD25 : PTXReg<"rd25">;
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def RD26 : PTXReg<"rd26">;
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def RD27 : PTXReg<"rd27">;
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def RD28 : PTXReg<"rd28">;
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def RD29 : PTXReg<"rd29">;
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def RD30 : PTXReg<"rd30">;
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def RD31 : PTXReg<"rd31">;
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def RD32 : PTXReg<"rd32">;
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def RD33 : PTXReg<"rd33">;
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def RD34 : PTXReg<"rd34">;
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def RD35 : PTXReg<"rd35">;
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def RD36 : PTXReg<"rd36">;
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def RD37 : PTXReg<"rd37">;
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def RD38 : PTXReg<"rd38">;
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def RD39 : PTXReg<"rd39">;
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def RD40 : PTXReg<"rd40">;
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def RD41 : PTXReg<"rd41">;
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def RD42 : PTXReg<"rd42">;
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def RD43 : PTXReg<"rd43">;
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def RD44 : PTXReg<"rd44">;
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def RD45 : PTXReg<"rd45">;
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def RD46 : PTXReg<"rd46">;
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def RD47 : PTXReg<"rd47">;
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def RD48 : PTXReg<"rd48">;
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def RD49 : PTXReg<"rd49">;
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def RD50 : PTXReg<"rd50">;
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def RD51 : PTXReg<"rd51">;
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def RD52 : PTXReg<"rd52">;
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def RD53 : PTXReg<"rd53">;
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def RD54 : PTXReg<"rd54">;
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def RD55 : PTXReg<"rd55">;
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def RD56 : PTXReg<"rd56">;
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def RD57 : PTXReg<"rd57">;
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def RD58 : PTXReg<"rd58">;
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def RD59 : PTXReg<"rd59">;
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def RD60 : PTXReg<"rd60">;
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def RD61 : PTXReg<"rd61">;
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def RD62 : PTXReg<"rd62">;
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def RD63 : PTXReg<"rd63">;
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def RD64 : PTXReg<"rd64">;
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def RD65 : PTXReg<"rd65">;
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def RD66 : PTXReg<"rd66">;
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def RD67 : PTXReg<"rd67">;
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def RD68 : PTXReg<"rd68">;
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def RD69 : PTXReg<"rd69">;
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def RD70 : PTXReg<"rd70">;
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def RD71 : PTXReg<"rd71">;
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def RD72 : PTXReg<"rd72">;
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def RD73 : PTXReg<"rd73">;
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|
def RD74 : PTXReg<"rd74">;
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def RD75 : PTXReg<"rd75">;
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|
def RD76 : PTXReg<"rd76">;
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|
def RD77 : PTXReg<"rd77">;
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|
def RD78 : PTXReg<"rd78">;
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|
def RD79 : PTXReg<"rd79">;
|
|
def RD80 : PTXReg<"rd80">;
|
|
def RD81 : PTXReg<"rd81">;
|
|
def RD82 : PTXReg<"rd82">;
|
|
def RD83 : PTXReg<"rd83">;
|
|
def RD84 : PTXReg<"rd84">;
|
|
def RD85 : PTXReg<"rd85">;
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|
def RD86 : PTXReg<"rd86">;
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|
def RD87 : PTXReg<"rd87">;
|
|
def RD88 : PTXReg<"rd88">;
|
|
def RD89 : PTXReg<"rd89">;
|
|
def RD90 : PTXReg<"rd90">;
|
|
def RD91 : PTXReg<"rd91">;
|
|
def RD92 : PTXReg<"rd92">;
|
|
def RD93 : PTXReg<"rd93">;
|
|
def RD94 : PTXReg<"rd94">;
|
|
def RD95 : PTXReg<"rd95">;
|
|
def RD96 : PTXReg<"rd96">;
|
|
def RD97 : PTXReg<"rd97">;
|
|
def RD98 : PTXReg<"rd98">;
|
|
def RD99 : PTXReg<"rd99">;
|
|
def RD100 : PTXReg<"rd100">;
|
|
def RD101 : PTXReg<"rd101">;
|
|
def RD102 : PTXReg<"rd102">;
|
|
def RD103 : PTXReg<"rd103">;
|
|
def RD104 : PTXReg<"rd104">;
|
|
def RD105 : PTXReg<"rd105">;
|
|
def RD106 : PTXReg<"rd106">;
|
|
def RD107 : PTXReg<"rd107">;
|
|
def RD108 : PTXReg<"rd108">;
|
|
def RD109 : PTXReg<"rd109">;
|
|
def RD110 : PTXReg<"rd110">;
|
|
def RD111 : PTXReg<"rd111">;
|
|
def RD112 : PTXReg<"rd112">;
|
|
def RD113 : PTXReg<"rd113">;
|
|
def RD114 : PTXReg<"rd114">;
|
|
def RD115 : PTXReg<"rd115">;
|
|
def RD116 : PTXReg<"rd116">;
|
|
def RD117 : PTXReg<"rd117">;
|
|
def RD118 : PTXReg<"rd118">;
|
|
def RD119 : PTXReg<"rd119">;
|
|
def RD120 : PTXReg<"rd120">;
|
|
def RD121 : PTXReg<"rd121">;
|
|
def RD122 : PTXReg<"rd122">;
|
|
def RD123 : PTXReg<"rd123">;
|
|
def RD124 : PTXReg<"rd124">;
|
|
def RD125 : PTXReg<"rd125">;
|
|
def RD126 : PTXReg<"rd126">;
|
|
def RD127 : PTXReg<"rd127">;
|
|
|
|
//===----------------------------------------------------------------------===//
|
|
// Register classes
|
|
//===----------------------------------------------------------------------===//
|
|
def RegPred : RegisterClass<"PTX", [i1], 8, (sequence "P%u", 0, 127)>;
|
|
def RegI16 : RegisterClass<"PTX", [i16], 16, (sequence "RH%u", 0, 127)>;
|
|
def RegI32 : RegisterClass<"PTX", [i32], 32, (sequence "R%u", 0, 127)>;
|
|
def RegI64 : RegisterClass<"PTX", [i64], 64, (sequence "RD%u", 0, 127)>;
|
|
def RegF32 : RegisterClass<"PTX", [f32], 32, (sequence "R%u", 0, 127)>;
|
|
def RegF64 : RegisterClass<"PTX", [f64], 64, (sequence "RD%u", 0, 127)>;
|