mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 04:30:12 +00:00
8f2a85e099
This commit adds a weak variant of the cmpxchg operation, as described
in C++11. A cmpxchg instruction with this modifier is permitted to
fail to store, even if the comparison indicated it should.
As a result, cmpxchg instructions must return a flag indicating
success in addition to their original iN value loaded. Thus, for
uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The
second flag is 1 when the store succeeded.
At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been
added as the natural representation for the new cmpxchg instructions.
It is a strong cmpxchg.
By default this gets Expanded to the existing ATOMIC_CMP_SWAP during
Legalization, so existing backends should see no change in behaviour.
If they wish to deal with the enhanced node instead, they can call
setOperationAction on it. Beware: as a node with 2 results, it cannot
be selected from TableGen.
Currently, no use is made of the extra information provided in this
patch. Test updates are almost entirely adapting the input IR to the
new scheme.
Summary for out of tree users:
------------------------------
+ Legacy Bitcode files are upgraded during read.
+ Legacy assembly IR files will be invalid.
+ Front-ends must adapt to different type for "cmpxchg".
+ Backends should be unaffected by default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210903 91177308-0d34-0410-b5e6-96231b3b80d8
328 lines
14 KiB
LLVM
328 lines
14 KiB
LLVM
; RUN: llvm-dis < %s.bc| FileCheck %s
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; memOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
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; The test checks that LLVM does not misread memory related instructions of
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; older bitcode files.
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define void @alloca(){
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entry:
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; CHECK: %res1 = alloca i8
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%res1 = alloca i8
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; CHECK-NEXT: %res2 = alloca i8, i32 2
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%res2 = alloca i8, i32 2
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; CHECK-NEXT: %res3 = alloca i8, i32 2, align 4
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%res3 = alloca i8, i32 2, align 4
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; CHECK-NEXT: %res4 = alloca i8, align 4
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%res4 = alloca i8, align 4
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ret void
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}
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define void @load(){
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entry:
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%ptr1 = alloca i8
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store i8 2, i8* %ptr1
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; CHECK: %res1 = load i8* %ptr1
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%res1 = load i8* %ptr1
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; CHECK-NEXT: %res2 = load volatile i8* %ptr1
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%res2 = load volatile i8* %ptr1
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; CHECK-NEXT: %res3 = load i8* %ptr1, align 1
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%res3 = load i8* %ptr1, align 1
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; CHECK-NEXT: %res4 = load volatile i8* %ptr1, align 1
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%res4 = load volatile i8* %ptr1, align 1
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; CHECK-NEXT: %res5 = load i8* %ptr1, !nontemporal !0
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%res5 = load i8* %ptr1, !nontemporal !0
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; CHECK-NEXT: %res6 = load volatile i8* %ptr1, !nontemporal !0
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%res6 = load volatile i8* %ptr1, !nontemporal !0
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; CHECK-NEXT: %res7 = load i8* %ptr1, align 1, !nontemporal !0
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%res7 = load i8* %ptr1, align 1, !nontemporal !0
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; CHECK-NEXT: %res8 = load volatile i8* %ptr1, align 1, !nontemporal !0
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%res8 = load volatile i8* %ptr1, align 1, !nontemporal !0
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; CHECK-NEXT: %res9 = load i8* %ptr1, !invariant.load !1
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%res9 = load i8* %ptr1, !invariant.load !1
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; CHECK-NEXT: %res10 = load volatile i8* %ptr1, !invariant.load !1
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%res10 = load volatile i8* %ptr1, !invariant.load !1
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; CHECK-NEXT: %res11 = load i8* %ptr1, align 1, !invariant.load !1
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%res11 = load i8* %ptr1, align 1, !invariant.load !1
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; CHECK-NEXT: %res12 = load volatile i8* %ptr1, align 1, !invariant.load !1
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%res12 = load volatile i8* %ptr1, align 1, !invariant.load !1
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; CHECK-NEXT: %res13 = load i8* %ptr1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
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%res13 = load i8* %ptr1, !nontemporal !0, !invariant.load !1
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; CHECK-NEXT: %res14 = load volatile i8* %ptr1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
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%res14 = load volatile i8* %ptr1, !nontemporal !0, !invariant.load !1
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; CHECK-NEXT: %res15 = load i8* %ptr1, align 1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
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%res15 = load i8* %ptr1, align 1, !nontemporal !0, !invariant.load !1
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; CHECK-NEXT: %res16 = load volatile i8* %ptr1, align 1, {{[(!nontemporal !0, !invariant.load !1) | (!invariant.load !1, !nontemporal !0)]}}
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%res16 = load volatile i8* %ptr1, align 1, !nontemporal !0, !invariant.load !1
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ret void
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}
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define void @loadAtomic(){
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entry:
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%ptr1 = alloca i8
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store i8 2, i8* %ptr1
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; CHECK: %res1 = load atomic i8* %ptr1 unordered, align 1
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%res1 = load atomic i8* %ptr1 unordered, align 1
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; CHECK-NEXT: %res2 = load atomic i8* %ptr1 monotonic, align 1
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%res2 = load atomic i8* %ptr1 monotonic, align 1
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; CHECK-NEXT: %res3 = load atomic i8* %ptr1 acquire, align 1
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%res3 = load atomic i8* %ptr1 acquire, align 1
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; CHECK-NEXT: %res4 = load atomic i8* %ptr1 seq_cst, align 1
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%res4 = load atomic i8* %ptr1 seq_cst, align 1
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; CHECK-NEXT: %res5 = load atomic volatile i8* %ptr1 unordered, align 1
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%res5 = load atomic volatile i8* %ptr1 unordered, align 1
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; CHECK-NEXT: %res6 = load atomic volatile i8* %ptr1 monotonic, align 1
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%res6 = load atomic volatile i8* %ptr1 monotonic, align 1
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; CHECK-NEXT: %res7 = load atomic volatile i8* %ptr1 acquire, align 1
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%res7 = load atomic volatile i8* %ptr1 acquire, align 1
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; CHECK-NEXT: %res8 = load atomic volatile i8* %ptr1 seq_cst, align 1
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%res8 = load atomic volatile i8* %ptr1 seq_cst, align 1
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; CHECK-NEXT: %res9 = load atomic i8* %ptr1 singlethread unordered, align 1
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%res9 = load atomic i8* %ptr1 singlethread unordered, align 1
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; CHECK-NEXT: %res10 = load atomic i8* %ptr1 singlethread monotonic, align 1
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%res10 = load atomic i8* %ptr1 singlethread monotonic, align 1
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; CHECK-NEXT: %res11 = load atomic i8* %ptr1 singlethread acquire, align 1
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%res11 = load atomic i8* %ptr1 singlethread acquire, align 1
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; CHECK-NEXT: %res12 = load atomic i8* %ptr1 singlethread seq_cst, align 1
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%res12 = load atomic i8* %ptr1 singlethread seq_cst, align 1
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; CHECK-NEXT: %res13 = load atomic volatile i8* %ptr1 singlethread unordered, align 1
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%res13 = load atomic volatile i8* %ptr1 singlethread unordered, align 1
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; CHECK-NEXT: %res14 = load atomic volatile i8* %ptr1 singlethread monotonic, align 1
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%res14 = load atomic volatile i8* %ptr1 singlethread monotonic, align 1
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; CHECK-NEXT: %res15 = load atomic volatile i8* %ptr1 singlethread acquire, align 1
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%res15 = load atomic volatile i8* %ptr1 singlethread acquire, align 1
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; CHECK-NEXT: %res16 = load atomic volatile i8* %ptr1 singlethread seq_cst, align 1
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%res16 = load atomic volatile i8* %ptr1 singlethread seq_cst, align 1
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ret void
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}
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define void @store(){
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entry:
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%ptr1 = alloca i8
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; CHECK: store i8 2, i8* %ptr1
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store i8 2, i8* %ptr1
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; CHECK-NEXT: store volatile i8 2, i8* %ptr1
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store volatile i8 2, i8* %ptr1
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; CHECK-NEXT: store i8 2, i8* %ptr1, align 1
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store i8 2, i8* %ptr1, align 1
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; CHECK-NEXT: store volatile i8 2, i8* %ptr1, align 1
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store volatile i8 2, i8* %ptr1, align 1
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; CHECK-NEXT: store i8 2, i8* %ptr1, !nontemporal !0
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store i8 2, i8* %ptr1, !nontemporal !0
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; CHECK-NEXT: store volatile i8 2, i8* %ptr1, !nontemporal !0
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store volatile i8 2, i8* %ptr1, !nontemporal !0
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; CHECK-NEXT: store i8 2, i8* %ptr1, align 1, !nontemporal !0
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store i8 2, i8* %ptr1, align 1, !nontemporal !0
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; CHECK-NEXT: store volatile i8 2, i8* %ptr1, align 1, !nontemporal !0
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store volatile i8 2, i8* %ptr1, align 1, !nontemporal !0
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ret void
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}
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define void @storeAtomic(){
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entry:
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%ptr1 = alloca i8
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; CHECK: store atomic i8 2, i8* %ptr1 unordered, align 1
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store atomic i8 2, i8* %ptr1 unordered, align 1
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; CHECK-NEXT: store atomic i8 2, i8* %ptr1 monotonic, align 1
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store atomic i8 2, i8* %ptr1 monotonic, align 1
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; CHECK-NEXT: store atomic i8 2, i8* %ptr1 release, align 1
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store atomic i8 2, i8* %ptr1 release, align 1
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; CHECK-NEXT: store atomic i8 2, i8* %ptr1 seq_cst, align 1
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store atomic i8 2, i8* %ptr1 seq_cst, align 1
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; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 unordered, align 1
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store atomic volatile i8 2, i8* %ptr1 unordered, align 1
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; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 monotonic, align 1
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store atomic volatile i8 2, i8* %ptr1 monotonic, align 1
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; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 release, align 1
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store atomic volatile i8 2, i8* %ptr1 release, align 1
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; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 seq_cst, align 1
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store atomic volatile i8 2, i8* %ptr1 seq_cst, align 1
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; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread unordered, align 1
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store atomic i8 2, i8* %ptr1 singlethread unordered, align 1
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; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread monotonic, align 1
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store atomic i8 2, i8* %ptr1 singlethread monotonic, align 1
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; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread release, align 1
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store atomic i8 2, i8* %ptr1 singlethread release, align 1
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; CHECK-NEXT: store atomic i8 2, i8* %ptr1 singlethread seq_cst, align 1
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store atomic i8 2, i8* %ptr1 singlethread seq_cst, align 1
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; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread unordered, align 1
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store atomic volatile i8 2, i8* %ptr1 singlethread unordered, align 1
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; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread monotonic, align 1
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store atomic volatile i8 2, i8* %ptr1 singlethread monotonic, align 1
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; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread release, align 1
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store atomic volatile i8 2, i8* %ptr1 singlethread release, align 1
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; CHECK-NEXT: store atomic volatile i8 2, i8* %ptr1 singlethread seq_cst, align 1
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store atomic volatile i8 2, i8* %ptr1 singlethread seq_cst, align 1
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ret void
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}
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define void @cmpxchg(i32* %ptr,i32 %cmp,i32 %new){
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entry:
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;cmpxchg [volatile] <ty>* <pointer>, <ty> <cmp>, <ty> <new> [singlethread] <ordering>
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; CHECK: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
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; CHECK-NEXT: %res1 = extractvalue { i32, i1 } [[TMP]], 0
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%res1 = cmpxchg i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
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; CHECK-NEXT: %res2 = extractvalue { i32, i1 } [[TMP]], 0
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%res2 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new monotonic monotonic
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
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; CHECK-NEXT: %res3 = extractvalue { i32, i1 } [[TMP]], 0
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%res3 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
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; CHECK-NEXT: %res4 = extractvalue { i32, i1 } [[TMP]], 0
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%res4 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread monotonic monotonic
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new acquire acquire
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; CHECK-NEXT: %res5 = extractvalue { i32, i1 } [[TMP]], 0
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%res5 = cmpxchg i32* %ptr, i32 %cmp, i32 %new acquire acquire
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acquire acquire
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; CHECK-NEXT: %res6 = extractvalue { i32, i1 } [[TMP]], 0
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%res6 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acquire acquire
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
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; CHECK-NEXT: %res7 = extractvalue { i32, i1 } [[TMP]], 0
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%res7 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
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; CHECK-NEXT: %res8 = extractvalue { i32, i1 } [[TMP]], 0
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%res8 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new release monotonic
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; CHECK-NEXT: %res9 = extractvalue { i32, i1 } [[TMP]], 0
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%res9 = cmpxchg i32* %ptr, i32 %cmp, i32 %new release monotonic
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new release monotonic
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; CHECK-NEXT: %res10 = extractvalue { i32, i1 } [[TMP]], 0
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%res10 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new release monotonic
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
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; CHECK-NEXT: %res11 = extractvalue { i32, i1 } [[TMP]], 0
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%res11 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
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; CHECK-NEXT: %res12 = extractvalue { i32, i1 } [[TMP]], 0
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%res12 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
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; CHECK-NEXT: %res13 = extractvalue { i32, i1 } [[TMP]], 0
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%res13 = cmpxchg i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
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; CHECK-NEXT: %res14 = extractvalue { i32, i1 } [[TMP]], 0
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%res14 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acq_rel acquire
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
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; CHECK-NEXT: %res15 = extractvalue { i32, i1 } [[TMP]], 0
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%res15 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
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; CHECK-NEXT: %res16 = extractvalue { i32, i1 } [[TMP]], 0
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%res16 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
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; CHECK-NEXT: %res17 = extractvalue { i32, i1 } [[TMP]], 0
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%res17 = cmpxchg i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
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; CHECK-NEXT: %res18 = extractvalue { i32, i1 } [[TMP]], 0
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%res18 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new seq_cst seq_cst
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
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; CHECK-NEXT: %res19 = extractvalue { i32, i1 } [[TMP]], 0
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%res19 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
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; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
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; CHECK-NEXT: %res20 = extractvalue { i32, i1 } [[TMP]], 0
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%res20 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread seq_cst seq_cst
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ret void
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}
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define void @getelementptr({i8, i8}* %s, <4 x i8*> %ptrs, <4 x i64> %offsets ){
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entry:
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; CHECK: %res1 = getelementptr { i8, i8 }* %s, i32 1, i32 1
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%res1 = getelementptr {i8, i8}* %s, i32 1, i32 1
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; CHECK-NEXT: %res2 = getelementptr inbounds { i8, i8 }* %s, i32 1, i32 1
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%res2 = getelementptr inbounds {i8, i8}* %s, i32 1, i32 1
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; CHECK-NEXT: %res3 = getelementptr <4 x i8*> %ptrs, <4 x i64> %offsets
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%res3 = getelementptr <4 x i8*> %ptrs, <4 x i64> %offsets
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ret void
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}
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!0 = metadata !{ i32 1 }
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!1 = metadata !{} |