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https://github.com/c64scene-ar/llvm-6502.git
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59a5e979b5
This enables very common cases to switch to the smaller encoding. All of the standard LLVM canonicalizations of comparisons are the opposite of what we want. Compares with constants are moved to the RHS, but the first operand can be an inline immediate, literal constant, or SGPR using the 32-bit VOPC encoding. There are additional bad canonicalizations that should also be fixed, such as canonicalizing ge x, k to gt x, (k + 1) if this makes k no longer an inline immediate value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232988 91177308-0d34-0410-b5e6-96231b3b80d8
101 lines
3.6 KiB
LLVM
101 lines
3.6 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
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; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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define void @trunc_i64_to_i32_store(i32 addrspace(1)* %out, i64 %in) {
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; SI-LABEL: {{^}}trunc_i64_to_i32_store:
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; SI: s_load_dword [[SLOAD:s[0-9]+]], s[0:1], 0xb
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; SI: v_mov_b32_e32 [[VLOAD:v[0-9]+]], [[SLOAD]]
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; SI: buffer_store_dword [[VLOAD]]
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; EG-LABEL: {{^}}trunc_i64_to_i32_store:
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; EG: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
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; EG: LSHR
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; EG-NEXT: 2(
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%result = trunc i64 %in to i32 store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}trunc_load_shl_i64:
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; SI-DAG: s_load_dwordx2
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; SI-DAG: s_load_dword [[SREG:s[0-9]+]],
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; SI: s_lshl_b32 [[SHL:s[0-9]+]], [[SREG]], 2
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; SI: v_mov_b32_e32 [[VSHL:v[0-9]+]], [[SHL]]
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; SI: buffer_store_dword [[VSHL]],
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define void @trunc_load_shl_i64(i32 addrspace(1)* %out, i64 %a) {
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%b = shl i64 %a, 2
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%result = trunc i64 %b to i32
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}trunc_shl_i64:
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; SI: s_load_dwordx2 s{{\[}}[[LO_SREG:[0-9]+]]:{{[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xd
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; SI: s_lshl_b64 s{{\[}}[[LO_SHL:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_SREG]]:{{[0-9]+\]}}, 2
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; SI: s_add_u32 s[[LO_SREG2:[0-9]+]], s[[LO_SHL]],
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; SI: s_addc_u32
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; SI: v_mov_b32_e32
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; SI: v_mov_b32_e32
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; SI: v_mov_b32_e32 v[[LO_VREG:[0-9]+]], s[[LO_SREG2]]
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; SI: buffer_store_dword v[[LO_VREG]],
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define void @trunc_shl_i64(i64 addrspace(1)* %out2, i32 addrspace(1)* %out, i64 %a) {
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%aa = add i64 %a, 234 ; Prevent shrinking store.
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%b = shl i64 %aa, 2
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%result = trunc i64 %b to i32
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store i32 %result, i32 addrspace(1)* %out, align 4
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store i64 %b, i64 addrspace(1)* %out2, align 8 ; Prevent reducing ops to 32-bits
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ret void
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}
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; SI-LABEL: {{^}}trunc_i32_to_i1:
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; SI: v_and_b32_e32 v{{[0-9]+}}, 1, v{{[0-9]+}}
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; SI: v_cmp_eq_i32
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define void @trunc_i32_to_i1(i32 addrspace(1)* %out, i32 addrspace(1)* %ptr) {
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%a = load i32, i32 addrspace(1)* %ptr, align 4
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%trunc = trunc i32 %a to i1
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%result = select i1 %trunc, i32 1, i32 0
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}sgpr_trunc_i32_to_i1:
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; SI: v_and_b32_e64 v{{[0-9]+}}, 1, s{{[0-9]+}}
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; SI: v_cmp_eq_i32
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define void @sgpr_trunc_i32_to_i1(i32 addrspace(1)* %out, i32 %a) {
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%trunc = trunc i32 %a to i1
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%result = select i1 %trunc, i32 1, i32 0
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store i32 %result, i32 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: {{^}}s_trunc_i64_to_i1:
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; SI: s_load_dwordx2 s{{\[}}[[SLO:[0-9]+]]:{{[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0xb
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; SI: v_and_b32_e64 [[MASKED:v[0-9]+]], 1, s[[SLO]]
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; SI: v_cmp_eq_i32_e32 vcc, 1, [[MASKED]]
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; SI: v_cndmask_b32_e64 {{v[0-9]+}}, -12, 63, vcc
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define void @s_trunc_i64_to_i1(i32 addrspace(1)* %out, i64 %x) {
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%trunc = trunc i64 %x to i1
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%sel = select i1 %trunc, i32 63, i32 -12
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store i32 %sel, i32 addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}v_trunc_i64_to_i1:
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; SI: buffer_load_dwordx2 v{{\[}}[[VLO:[0-9]+]]:{{[0-9]+\]}}
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; SI: v_and_b32_e32 [[MASKED:v[0-9]+]], 1, v[[VLO]]
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; SI: v_cmp_eq_i32_e32 vcc, 1, [[MASKED]]
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; SI: v_cndmask_b32_e64 {{v[0-9]+}}, -12, 63, vcc
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define void @v_trunc_i64_to_i1(i32 addrspace(1)* %out, i64 addrspace(1)* %in) {
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%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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%out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid
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%x = load i64, i64 addrspace(1)* %gep
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%trunc = trunc i64 %x to i1
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%sel = select i1 %trunc, i32 63, i32 -12
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store i32 %sel, i32 addrspace(1)* %out.gep
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ret void
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}
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