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https://github.com/c64scene-ar/llvm-6502.git
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Move the target-specific RecordRelocation logic out of the generic MC MachObjectWriter and into the target-specific object writers. This allows nuking quite a bit of target knowledge from the supposedly target-independent bits in lib/MC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133844 91177308-0d34-0410-b5e6-96231b3b80d8
555 lines
22 KiB
C++
555 lines
22 KiB
C++
//===-- X86MachObjectWriter.cpp - X86 Mach-O Writer -----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "X86.h"
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#include "X86FixupKinds.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/MC/MCAssembler.h"
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#include "llvm/MC/MCAsmLayout.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Object/MachOFormat.h"
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using namespace llvm;
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using namespace llvm::object;
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namespace {
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class X86MachObjectWriter : public MCMachObjectTargetWriter {
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void RecordScatteredRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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unsigned Log2Size,
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uint64_t &FixedValue);
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void RecordTLVPRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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uint64_t &FixedValue);
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void RecordX86Relocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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uint64_t &FixedValue);
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void RecordX86_64Relocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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uint64_t &FixedValue);
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public:
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X86MachObjectWriter(bool Is64Bit, uint32_t CPUType,
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uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype,
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/*UseAggressiveSymbolFolding=*/Is64Bit) {}
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void RecordRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup,
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MCValue Target, uint64_t &FixedValue) {
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if (Writer->is64Bit())
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RecordX86_64Relocation(Writer, Asm, Layout, Fragment, Fixup, Target,
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FixedValue);
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else
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RecordX86Relocation(Writer, Asm, Layout, Fragment, Fixup, Target,
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FixedValue);
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}
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};
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}
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static bool isFixupKindRIPRel(unsigned Kind) {
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return Kind == X86::reloc_riprel_4byte ||
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Kind == X86::reloc_riprel_4byte_movq_load;
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}
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static unsigned getFixupKindLog2Size(unsigned Kind) {
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switch (Kind) {
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default:
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llvm_unreachable("invalid fixup kind!");
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case FK_PCRel_1:
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case FK_Data_1: return 0;
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case FK_PCRel_2:
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case FK_Data_2: return 1;
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case FK_PCRel_4:
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// FIXME: Remove these!!!
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case X86::reloc_riprel_4byte:
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case X86::reloc_riprel_4byte_movq_load:
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case X86::reloc_signed_4byte:
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case FK_Data_4: return 2;
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case FK_Data_8: return 3;
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}
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}
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void X86MachObjectWriter::RecordX86_64Relocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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uint64_t &FixedValue) {
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unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
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unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind());
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unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
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// See <reloc.h>.
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uint32_t FixupOffset =
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Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
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uint32_t FixupAddress =
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Writer->getFragmentAddress(Fragment, Layout) + Fixup.getOffset();
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int64_t Value = 0;
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unsigned Index = 0;
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unsigned IsExtern = 0;
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unsigned Type = 0;
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Value = Target.getConstant();
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if (IsPCRel) {
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// Compensate for the relocation offset, Darwin x86_64 relocations only have
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// the addend and appear to have attempted to define it to be the actual
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// expression addend without the PCrel bias. However, instructions with data
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// following the relocation are not accommodated for (see comment below
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// regarding SIGNED{1,2,4}), so it isn't exactly that either.
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Value += 1LL << Log2Size;
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}
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if (Target.isAbsolute()) { // constant
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// SymbolNum of 0 indicates the absolute section.
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Type = macho::RIT_X86_64_Unsigned;
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Index = 0;
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// FIXME: I believe this is broken, I don't think the linker can understand
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// it. I think it would require a local relocation, but I'm not sure if that
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// would work either. The official way to get an absolute PCrel relocation
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// is to use an absolute symbol (which we don't support yet).
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if (IsPCRel) {
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IsExtern = 1;
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Type = macho::RIT_X86_64_Branch;
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}
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} else if (Target.getSymB()) { // A - B + constant
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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MCSymbolData &A_SD = Asm.getSymbolData(*A);
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const MCSymbolData *A_Base = Asm.getAtom(&A_SD);
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const MCSymbol *B = &Target.getSymB()->getSymbol();
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MCSymbolData &B_SD = Asm.getSymbolData(*B);
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const MCSymbolData *B_Base = Asm.getAtom(&B_SD);
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// Neither symbol can be modified.
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if (Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None ||
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Target.getSymB()->getKind() != MCSymbolRefExpr::VK_None)
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report_fatal_error("unsupported relocation of modified symbol");
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// We don't support PCrel relocations of differences. Darwin 'as' doesn't
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// implement most of these correctly.
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if (IsPCRel)
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report_fatal_error("unsupported pc-relative relocation of difference");
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// The support for the situation where one or both of the symbols would
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// require a local relocation is handled just like if the symbols were
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// external. This is certainly used in the case of debug sections where the
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// section has only temporary symbols and thus the symbols don't have base
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// symbols. This is encoded using the section ordinal and non-extern
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// relocation entries.
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// Darwin 'as' doesn't emit correct relocations for this (it ends up with a
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// single SIGNED relocation); reject it for now. Except the case where both
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// symbols don't have a base, equal but both NULL.
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if (A_Base == B_Base && A_Base)
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report_fatal_error("unsupported relocation with identical base");
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Value += Writer->getSymbolAddress(&A_SD, Layout) -
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(A_Base == NULL ? 0 : Writer->getSymbolAddress(A_Base, Layout));
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Value -= Writer->getSymbolAddress(&B_SD, Layout) -
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(B_Base == NULL ? 0 : Writer->getSymbolAddress(B_Base, Layout));
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if (A_Base) {
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Index = A_Base->getIndex();
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IsExtern = 1;
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}
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else {
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Index = A_SD.getFragment()->getParent()->getOrdinal() + 1;
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IsExtern = 0;
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}
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Type = macho::RIT_X86_64_Unsigned;
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macho::RelocationEntry MRE;
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MRE.Word0 = FixupOffset;
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MRE.Word1 = ((Index << 0) |
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(IsPCRel << 24) |
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(Log2Size << 25) |
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(IsExtern << 27) |
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(Type << 28));
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Writer->addRelocation(Fragment->getParent(), MRE);
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if (B_Base) {
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Index = B_Base->getIndex();
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IsExtern = 1;
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}
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else {
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Index = B_SD.getFragment()->getParent()->getOrdinal() + 1;
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IsExtern = 0;
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}
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Type = macho::RIT_X86_64_Subtractor;
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} else {
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const MCSymbol *Symbol = &Target.getSymA()->getSymbol();
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MCSymbolData &SD = Asm.getSymbolData(*Symbol);
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const MCSymbolData *Base = Asm.getAtom(&SD);
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// Relocations inside debug sections always use local relocations when
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// possible. This seems to be done because the debugger doesn't fully
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// understand x86_64 relocation entries, and expects to find values that
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// have already been fixed up.
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if (Symbol->isInSection()) {
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const MCSectionMachO &Section = static_cast<const MCSectionMachO&>(
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Fragment->getParent()->getSection());
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if (Section.hasAttribute(MCSectionMachO::S_ATTR_DEBUG))
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Base = 0;
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}
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// x86_64 almost always uses external relocations, except when there is no
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// symbol to use as a base address (a local symbol with no preceding
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// non-local symbol).
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if (Base) {
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Index = Base->getIndex();
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IsExtern = 1;
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// Add the local offset, if needed.
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if (Base != &SD)
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Value += Layout.getSymbolOffset(&SD) - Layout.getSymbolOffset(Base);
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} else if (Symbol->isInSection() && !Symbol->isVariable()) {
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// The index is the section ordinal (1-based).
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Index = SD.getFragment()->getParent()->getOrdinal() + 1;
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IsExtern = 0;
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Value += Writer->getSymbolAddress(&SD, Layout);
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if (IsPCRel)
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Value -= FixupAddress + (1 << Log2Size);
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} else if (Symbol->isVariable()) {
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const MCExpr *Value = Symbol->getVariableValue();
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int64_t Res;
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bool isAbs = Value->EvaluateAsAbsolute(Res, Layout,
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Writer->getSectionAddressMap());
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if (isAbs) {
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FixedValue = Res;
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return;
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} else {
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report_fatal_error("unsupported relocation of variable '" +
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Symbol->getName() + "'");
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}
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} else {
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report_fatal_error("unsupported relocation of undefined symbol '" +
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Symbol->getName() + "'");
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}
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MCSymbolRefExpr::VariantKind Modifier = Target.getSymA()->getKind();
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if (IsPCRel) {
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if (IsRIPRel) {
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if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
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// x86_64 distinguishes movq foo@GOTPCREL so that the linker can
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// rewrite the movq to an leaq at link time if the symbol ends up in
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// the same linkage unit.
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if (unsigned(Fixup.getKind()) == X86::reloc_riprel_4byte_movq_load)
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Type = macho::RIT_X86_64_GOTLoad;
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else
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Type = macho::RIT_X86_64_GOT;
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} else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
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Type = macho::RIT_X86_64_TLV;
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} else if (Modifier != MCSymbolRefExpr::VK_None) {
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report_fatal_error("unsupported symbol modifier in relocation");
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} else {
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Type = macho::RIT_X86_64_Signed;
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// The Darwin x86_64 relocation format has a problem where it cannot
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// encode an address (L<foo> + <constant>) which is outside the atom
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// containing L<foo>. Generally, this shouldn't occur but it does
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// happen when we have a RIPrel instruction with data following the
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// relocation entry (e.g., movb $012, L0(%rip)). Even with the PCrel
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// adjustment Darwin x86_64 uses, the offset is still negative and the
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// linker has no way to recognize this.
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//
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// To work around this, Darwin uses several special relocation types
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// to indicate the offsets. However, the specification or
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// implementation of these seems to also be incomplete; they should
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// adjust the addend as well based on the actual encoded instruction
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// (the additional bias), but instead appear to just look at the final
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// offset.
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switch (-(Target.getConstant() + (1LL << Log2Size))) {
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case 1: Type = macho::RIT_X86_64_Signed1; break;
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case 2: Type = macho::RIT_X86_64_Signed2; break;
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case 4: Type = macho::RIT_X86_64_Signed4; break;
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}
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}
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} else {
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if (Modifier != MCSymbolRefExpr::VK_None)
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report_fatal_error("unsupported symbol modifier in branch "
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"relocation");
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Type = macho::RIT_X86_64_Branch;
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}
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} else {
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if (Modifier == MCSymbolRefExpr::VK_GOT) {
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Type = macho::RIT_X86_64_GOT;
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} else if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
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// GOTPCREL is allowed as a modifier on non-PCrel instructions, in which
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// case all we do is set the PCrel bit in the relocation entry; this is
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// used with exception handling, for example. The source is required to
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// include any necessary offset directly.
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Type = macho::RIT_X86_64_GOT;
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IsPCRel = 1;
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} else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
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report_fatal_error("TLVP symbol modifier should have been rip-rel");
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} else if (Modifier != MCSymbolRefExpr::VK_None)
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report_fatal_error("unsupported symbol modifier in relocation");
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else
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Type = macho::RIT_X86_64_Unsigned;
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}
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}
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// x86_64 always writes custom values into the fixups.
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FixedValue = Value;
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// struct relocation_info (8 bytes)
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macho::RelocationEntry MRE;
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MRE.Word0 = FixupOffset;
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MRE.Word1 = ((Index << 0) |
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(IsPCRel << 24) |
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(Log2Size << 25) |
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(IsExtern << 27) |
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(Type << 28));
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Writer->addRelocation(Fragment->getParent(), MRE);
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}
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void X86MachObjectWriter::RecordScatteredRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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unsigned Log2Size,
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uint64_t &FixedValue) {
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uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
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unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
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unsigned Type = macho::RIT_Vanilla;
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// See <reloc.h>.
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const MCSymbol *A = &Target.getSymA()->getSymbol();
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MCSymbolData *A_SD = &Asm.getSymbolData(*A);
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if (!A_SD->getFragment())
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report_fatal_error("symbol '" + A->getName() +
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"' can not be undefined in a subtraction expression");
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uint32_t Value = Writer->getSymbolAddress(A_SD, Layout);
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uint64_t SecAddr = Writer->getSectionAddress(A_SD->getFragment()->getParent());
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FixedValue += SecAddr;
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uint32_t Value2 = 0;
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if (const MCSymbolRefExpr *B = Target.getSymB()) {
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MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());
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if (!B_SD->getFragment())
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report_fatal_error("symbol '" + B->getSymbol().getName() +
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"' can not be undefined in a subtraction expression");
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// Select the appropriate difference relocation type.
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//
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// Note that there is no longer any semantic difference between these two
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// relocation types from the linkers point of view, this is done solely for
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// pedantic compatibility with 'as'.
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Type = A_SD->isExternal() ? (unsigned)macho::RIT_Difference :
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(unsigned)macho::RIT_Generic_LocalDifference;
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Value2 = Writer->getSymbolAddress(B_SD, Layout);
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FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent());
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}
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// Relocations are written out in reverse order, so the PAIR comes first.
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if (Type == macho::RIT_Difference ||
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Type == macho::RIT_Generic_LocalDifference) {
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macho::RelocationEntry MRE;
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MRE.Word0 = ((0 << 0) |
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(macho::RIT_Pair << 24) |
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(Log2Size << 28) |
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(IsPCRel << 30) |
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macho::RF_Scattered);
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MRE.Word1 = Value2;
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Writer->addRelocation(Fragment->getParent(), MRE);
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}
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macho::RelocationEntry MRE;
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MRE.Word0 = ((FixupOffset << 0) |
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(Type << 24) |
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(Log2Size << 28) |
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(IsPCRel << 30) |
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macho::RF_Scattered);
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MRE.Word1 = Value;
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Writer->addRelocation(Fragment->getParent(), MRE);
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}
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void X86MachObjectWriter::RecordTLVPRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
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MCValue Target,
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uint64_t &FixedValue) {
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assert(Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP &&
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!is64Bit() &&
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"Should only be called with a 32-bit TLVP relocation!");
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unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
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uint32_t Value = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
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unsigned IsPCRel = 0;
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// Get the symbol data.
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MCSymbolData *SD_A = &Asm.getSymbolData(Target.getSymA()->getSymbol());
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unsigned Index = SD_A->getIndex();
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// We're only going to have a second symbol in pic mode and it'll be a
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// subtraction from the picbase. For 32-bit pic the addend is the difference
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// between the picbase and the next address. For 32-bit static the addend is
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// zero.
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if (Target.getSymB()) {
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// If this is a subtraction then we're pcrel.
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uint32_t FixupAddress =
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Writer->getFragmentAddress(Fragment, Layout) + Fixup.getOffset();
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MCSymbolData *SD_B = &Asm.getSymbolData(Target.getSymB()->getSymbol());
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IsPCRel = 1;
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FixedValue = (FixupAddress - Writer->getSymbolAddress(SD_B, Layout) +
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Target.getConstant());
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FixedValue += 1ULL << Log2Size;
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} else {
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FixedValue = 0;
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}
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// struct relocation_info (8 bytes)
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macho::RelocationEntry MRE;
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MRE.Word0 = Value;
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MRE.Word1 = ((Index << 0) |
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(IsPCRel << 24) |
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(Log2Size << 25) |
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(1 << 27) | // Extern
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(macho::RIT_Generic_TLV << 28)); // Type
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Writer->addRelocation(Fragment->getParent(), MRE);
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}
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void X86MachObjectWriter::RecordX86Relocation(MachObjectWriter *Writer,
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const MCAssembler &Asm,
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const MCAsmLayout &Layout,
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const MCFragment *Fragment,
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const MCFixup &Fixup,
|
|
MCValue Target,
|
|
uint64_t &FixedValue) {
|
|
unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind());
|
|
unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
|
|
|
|
// If this is a 32-bit TLVP reloc it's handled a bit differently.
|
|
if (Target.getSymA() &&
|
|
Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP) {
|
|
RecordTLVPRelocation(Writer, Asm, Layout, Fragment, Fixup, Target,
|
|
FixedValue);
|
|
return;
|
|
}
|
|
|
|
// If this is a difference or a defined symbol plus an offset, then we need a
|
|
// scattered relocation entry. Differences always require scattered
|
|
// relocations.
|
|
if (Target.getSymB())
|
|
return RecordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
|
|
Target, Log2Size, FixedValue);
|
|
|
|
// Get the symbol data, if any.
|
|
MCSymbolData *SD = 0;
|
|
if (Target.getSymA())
|
|
SD = &Asm.getSymbolData(Target.getSymA()->getSymbol());
|
|
|
|
// If this is an internal relocation with an offset, it also needs a scattered
|
|
// relocation entry.
|
|
uint32_t Offset = Target.getConstant();
|
|
if (IsPCRel)
|
|
Offset += 1 << Log2Size;
|
|
if (Offset && SD && !Writer->doesSymbolRequireExternRelocation(SD))
|
|
return RecordScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup,
|
|
Target, Log2Size, FixedValue);
|
|
|
|
// See <reloc.h>.
|
|
uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
|
|
unsigned Index = 0;
|
|
unsigned IsExtern = 0;
|
|
unsigned Type = 0;
|
|
|
|
if (Target.isAbsolute()) { // constant
|
|
// SymbolNum of 0 indicates the absolute section.
|
|
//
|
|
// FIXME: Currently, these are never generated (see code below). I cannot
|
|
// find a case where they are actually emitted.
|
|
Type = macho::RIT_Vanilla;
|
|
} else {
|
|
// Resolve constant variables.
|
|
if (SD->getSymbol().isVariable()) {
|
|
int64_t Res;
|
|
if (SD->getSymbol().getVariableValue()->EvaluateAsAbsolute(
|
|
Res, Layout, Writer->getSectionAddressMap())) {
|
|
FixedValue = Res;
|
|
return;
|
|
}
|
|
}
|
|
|
|
// Check whether we need an external or internal relocation.
|
|
if (Writer->doesSymbolRequireExternRelocation(SD)) {
|
|
IsExtern = 1;
|
|
Index = SD->getIndex();
|
|
// For external relocations, make sure to offset the fixup value to
|
|
// compensate for the addend of the symbol address, if it was
|
|
// undefined. This occurs with weak definitions, for example.
|
|
if (!SD->Symbol->isUndefined())
|
|
FixedValue -= Layout.getSymbolOffset(SD);
|
|
} else {
|
|
// The index is the section ordinal (1-based).
|
|
const MCSectionData &SymSD = Asm.getSectionData(
|
|
SD->getSymbol().getSection());
|
|
Index = SymSD.getOrdinal() + 1;
|
|
FixedValue += Writer->getSectionAddress(&SymSD);
|
|
}
|
|
if (IsPCRel)
|
|
FixedValue -= Writer->getSectionAddress(Fragment->getParent());
|
|
|
|
Type = macho::RIT_Vanilla;
|
|
}
|
|
|
|
// struct relocation_info (8 bytes)
|
|
macho::RelocationEntry MRE;
|
|
MRE.Word0 = FixupOffset;
|
|
MRE.Word1 = ((Index << 0) |
|
|
(IsPCRel << 24) |
|
|
(Log2Size << 25) |
|
|
(IsExtern << 27) |
|
|
(Type << 28));
|
|
Writer->addRelocation(Fragment->getParent(), MRE);
|
|
}
|
|
|
|
MCObjectWriter *llvm::createX86MachObjectWriter(raw_ostream &OS,
|
|
bool Is64Bit,
|
|
uint32_t CPUType,
|
|
uint32_t CPUSubtype) {
|
|
return createMachObjectWriter(new X86MachObjectWriter(Is64Bit,
|
|
CPUType,
|
|
CPUSubtype),
|
|
OS, /*IsLittleEndian=*/true);
|
|
}
|