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A brief description about PIC16: =============================== PIC16 is an 8-bit microcontroller with only one 8-bit register which is the accumulator. All arithmetic/load/store operations are 8-bit only. The architecture has two address spaces: program and data. The program memory is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory. It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register). Two classes of registers exist: (8-bit class which is only one accumulator) (16-bit class, which contains one or more 16 bit pointer(s)) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51027 91177308-0d34-0410-b5e6-96231b3b80d8
93 lines
3.1 KiB
C++
93 lines
3.1 KiB
C++
//===-- PIC16ISelLowering.h - PIC16 DAG Lowering Interface ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the interfaces that PIC16 uses to lower LLVM code into a
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// selection DAG.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PIC16ISELLOWERING_H
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#define PIC16ISELLOWERING_H
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#include "llvm/CodeGen/SelectionDAG.h"
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#include "llvm/Target/TargetLowering.h"
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#include "PIC16.h"
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#include "PIC16Subtarget.h"
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namespace llvm {
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namespace PIC16ISD {
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enum NodeType {
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// Start the numbering from where ISD NodeType finishes.
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FIRST_NUMBER = ISD::BUILTIN_OP_END+PIC16::INSTRUCTION_LIST_END,
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// used for encapsulating the expanded nodes into one node.
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Package,
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// Get the Higher 16 bits from a 32-bit immediate
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Hi,
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// Get the Lower 16 bits from a 32-bit immediate
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Lo,
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Cmp, // PIC16 Generic Comparison instruction.
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Branch, // PIC16 Generic Branch Instruction.
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BTFSS, // PIC16 BitTest Instruction (Skip if set).
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BTFSC, // PIC16 BitTest Instruction (Skip if clear).
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// PIC16 comparison to be converted to either XOR or SUB
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// Following instructions cater to those convertions.
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XORCC,
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SUBCC,
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// Get the Global Address wrapped into a wrapper that also captures
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// the bank or page.
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Wrapper,
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SetBank,
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SetPage
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};
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}
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//===--------------------------------------------------------------------===//
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// TargetLowering Implementation
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//===--------------------------------------------------------------------===//
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class PIC16TargetLowering : public TargetLowering
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{
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public:
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typedef std::map<SDNode *, SDNode *> NodeMap_t;
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explicit PIC16TargetLowering(PIC16TargetMachine &TM);
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/// LowerOperation - Provide custom lowering hooks for some operations.
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virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerFrameIndex(SDOperand Op, SelectionDAG &DAG);
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SDOperand LowerBR_CC(SDOperand Op, SelectionDAG &DAG);
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SDOperand RemoveHiLo(SDNode *, SelectionDAG &DAG,
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DAGCombinerInfo &DCI) const;
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SDOperand LowerADDSUB(SDNode *, SelectionDAG &DAG,
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DAGCombinerInfo &DCI) const;
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SDOperand LowerLOAD(SDNode *, SelectionDAG &DAG,
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DAGCombinerInfo &DCI) const;
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/// getTargetNodeName - This method returns the name of a target specific
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// DAG node.
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virtual const char *getTargetNodeName(unsigned Opcode) const;
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virtual SDOperand PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
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// utility function.
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const SDOperand *findLoadi8(const SDOperand &Src, SelectionDAG &DAG) const;
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};
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} // namespace llvm
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#endif // PIC16ISELLOWERING_H
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