llvm-6502/test/CodeGen
Chandler Carruth c5114dbcc3 [x86] Teach the target combine step to aggressively fold pshufd insturcions.
Summary:
This allows it to fold pshufd instructions across intervening
half-shuffles and other noise. This pattern actually shows up in the
generic lowering tests, but I've also added direct tests using
intrinsics to make sure that the specific desired functionality is
working even if the lowering stuff changes in the future.

Differential Revision: http://reviews.llvm.org/D4292

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211892 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 11:40:13 +00:00
..
AArch64 MachineScheduler: add some book-keeping to fix an assert. 2014-06-27 04:57:05 +00:00
ARM Fix up scoping in a few tests (and delete one that validates unnecessary behavior). 2014-06-24 20:10:27 +00:00
CPP
Generic
Hexagon
Inputs
Mips Print a=b as an assignment. 2014-06-24 22:45:16 +00:00
MSP430
NVPTX
PowerPC Rename loop unrolling and loop vectorizer metadata to have a common prefix. 2014-06-25 15:41:00 +00:00
R600 R600: Add some testcases for promote alloca pass. 2014-06-27 03:55:55 +00:00
SPARC
SystemZ
Thumb
Thumb2 ARM: Fix TPsoft for Thumb mode 2014-06-24 15:45:59 +00:00
X86 [x86] Teach the target combine step to aggressively fold pshufd insturcions. 2014-06-27 11:40:13 +00:00
XCore