mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
82 lines
2.4 KiB
LLVM
82 lines
2.4 KiB
LLVM
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s
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; CHECK-LABEL: test1
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; CHECK: vmovdqu8
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; CHECK: ret
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define <64 x i8> @test1(i8 * %addr) {
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%vaddr = bitcast i8* %addr to <64 x i8>*
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%res = load <64 x i8>, <64 x i8>* %vaddr, align 1
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ret <64 x i8>%res
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}
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; CHECK-LABEL: test2
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; CHECK: vmovdqu8
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; CHECK: ret
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define void @test2(i8 * %addr, <64 x i8> %data) {
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%vaddr = bitcast i8* %addr to <64 x i8>*
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store <64 x i8>%data, <64 x i8>* %vaddr, align 1
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ret void
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}
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; CHECK-LABEL: test3
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; CHECK: vmovdqu8{{.*{%k[1-7]}}}
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; CHECK: ret
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define <64 x i8> @test3(i8 * %addr, <64 x i8> %old, <64 x i8> %mask1) {
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%mask = icmp ne <64 x i8> %mask1, zeroinitializer
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%vaddr = bitcast i8* %addr to <64 x i8>*
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%r = load <64 x i8>, <64 x i8>* %vaddr, align 1
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%res = select <64 x i1> %mask, <64 x i8> %r, <64 x i8> %old
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ret <64 x i8>%res
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}
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; CHECK-LABEL: test4
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; CHECK: vmovdqu8{{.*{%k[1-7]} {z}}}
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; CHECK: ret
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define <64 x i8> @test4(i8 * %addr, <64 x i8> %mask1) {
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%mask = icmp ne <64 x i8> %mask1, zeroinitializer
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%vaddr = bitcast i8* %addr to <64 x i8>*
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%r = load <64 x i8>, <64 x i8>* %vaddr, align 1
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%res = select <64 x i1> %mask, <64 x i8> %r, <64 x i8> zeroinitializer
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ret <64 x i8>%res
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}
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; CHECK-LABEL: test5
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; CHECK: vmovdqu16
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; CHECK: ret
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define <32 x i16> @test5(i8 * %addr) {
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%vaddr = bitcast i8* %addr to <32 x i16>*
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%res = load <32 x i16>, <32 x i16>* %vaddr, align 1
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ret <32 x i16>%res
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}
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; CHECK-LABEL: test6
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; CHECK: vmovdqu16
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; CHECK: ret
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define void @test6(i8 * %addr, <32 x i16> %data) {
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%vaddr = bitcast i8* %addr to <32 x i16>*
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store <32 x i16>%data, <32 x i16>* %vaddr, align 1
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ret void
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}
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; CHECK-LABEL: test7
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; CHECK: vmovdqu16{{.*{%k[1-7]}}}
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; CHECK: ret
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define <32 x i16> @test7(i8 * %addr, <32 x i16> %old, <32 x i16> %mask1) {
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%mask = icmp ne <32 x i16> %mask1, zeroinitializer
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%vaddr = bitcast i8* %addr to <32 x i16>*
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%r = load <32 x i16>, <32 x i16>* %vaddr, align 1
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%res = select <32 x i1> %mask, <32 x i16> %r, <32 x i16> %old
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ret <32 x i16>%res
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}
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; CHECK-LABEL: test8
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; CHECK: vmovdqu16{{.*{%k[1-7]} {z}}}
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; CHECK: ret
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define <32 x i16> @test8(i8 * %addr, <32 x i16> %mask1) {
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%mask = icmp ne <32 x i16> %mask1, zeroinitializer
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%vaddr = bitcast i8* %addr to <32 x i16>*
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%r = load <32 x i16>, <32 x i16>* %vaddr, align 1
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%res = select <32 x i1> %mask, <32 x i16> %r, <32 x i16> zeroinitializer
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ret <32 x i16>%res
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}
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