llvm-6502/lib/Target/ARM/Disassembler
Johnny Chen c584e317e9 ARM disassembler was erroneously accepting an invalid LSL instruction.
For register-controlled shifts, we should check that the encoding constraint
Inst{7} = 0 and Inst{4} = 1 is satisfied.

rdar://problem/9237693


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128941 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-05 21:49:44 +00:00
..
ARMDisassembler.cpp Fixed the t2PLD and friends disassembly and add two test cases. 2011-03-26 01:32:48 +00:00
ARMDisassembler.h
ARMDisassemblerCore.cpp ARM disassembler was erroneously accepting an invalid LSL instruction. 2011-04-05 21:49:44 +00:00
ARMDisassemblerCore.h RFE encoding should also specify the "should be" encoding bits. 2011-04-04 23:39:08 +00:00
CMakeLists.txt CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some files in Target/ARM and Target/X86. 2010-12-29 03:59:27 +00:00
Makefile
ThumbDisassemblerCore.h Fix ARM disassembly for PLD/PLDW/PLI which suffers from code rot and add some test cases. 2011-03-28 18:41:58 +00:00