Johnny Chen c584e317e9 ARM disassembler was erroneously accepting an invalid LSL instruction. ... For register-controlled shifts, we should check that the encoding constraint Inst{7} = 0 and Inst{4} = 1 is satisfied. rdar://problem/9237693 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128941 91177308-0d34-0410-b5e6-96231b3b80d8		2011-04-05 21:49:44 +00:00
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ARM	ARM disassembler was erroneously accepting an invalid LSL instruction.	2011-04-05 21:49:44 +00:00
MBlaze	Teach the MBlaze disassembler to disassemble special purpose registers.	2010-12-20 21:18:04 +00:00
X86	Basic sanity checks to ensure that 2- and 3-byte	2011-03-15 01:32:46 +00:00