llvm-6502/test/CodeGen
Kevin Enderby c5888b8d1b Add -mtriple=x86_64-linux to this test case to fix the build bots.5
The original commit was r203829.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203844 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-13 20:31:19 +00:00
..
AArch64 IR: add a second ordering operand to cmpxhg for failure 2014-03-11 10:48:52 +00:00
ARM Cleanup: Remove use of old "-enable-correct-eh-support" option from a test 2014-03-13 16:23:00 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] BSEL's and BINS[RL] operands are reversed compared to the vselect node used in the pattern. 2014-03-12 11:54:00 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Initial support for the VSX instruction set 2014-03-13 07:58:58 +00:00
R600 R600: LDS instructions shouldn't implicitly define OQAP 2014-03-13 17:13:04 +00:00
SPARC IR: add a second ordering operand to cmpxhg for failure 2014-03-11 10:48:52 +00:00
SystemZ IR: add a second ordering operand to cmpxhg for failure 2014-03-11 10:48:52 +00:00
Thumb
Thumb2
X86 Add -mtriple=x86_64-linux to this test case to fix the build bots.5 2014-03-13 20:31:19 +00:00
XCore