llvm-6502/utils/TableGen
Chad Rosier b7110cf5b5 Improve the compression of the tablegen DiffLists by introducing a new sort
algorithm when assigning EnumValues to the synthesized registers.

The current algorithm, LessRecord, uses the StringRef compare_numeric
function.  This function compares strings, while handling embedded numbers.
For example, the R600 backend registers are sorted as follows:

  T1
  T1_W
  T1_X
  T1_XYZW
  T1_Y
  T1_Z
  T2
  T2_W
  T2_X
  T2_XYZW
  T2_Y
  T2_Z

In this example, the 'scaling factor' is dEnum/dN = 6 because T0, T1, T2
have an EnumValue offset of 6 from one another.  However, in other parts
of the register bank, the scaling factors are different:

dEnum/dN = 5:
  KC0_128_W
  KC0_128_X
  KC0_128_XYZW
  KC0_128_Y
  KC0_128_Z
  KC0_129_W
  KC0_129_X
  KC0_129_XYZW
  KC0_129_Y
  KC0_129_Z

The diff lists do not work correctly because different kinds of registers have
different 'scaling factors'.  This new algorithm, LessRecordRegister, tries to
enforce a scaling factor of 1.  For example, the registers are now sorted as
follows:

  T1
  T2
  T3
  ...
  T0_W
  T1_W
  T2_W
  ...
  T0_X
  T1_X
  T2_X
  ...
  KC0_128_W
  KC0_129_W
  KC0_130_W
  ...

For the Mips and R600 I see a 19% and 6% reduction in size, respectively.  I
did see a few small regressions, but the differences were on the order of a
few bytes (e.g., AArch64 was 16 bytes).  I suspect there will be even
greater wins for targets with larger register files.

Patch reviewed by Jakob.
rdar://14006013


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185094 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-27 19:38:13 +00:00
..
AsmMatcherEmitter.cpp Handle tied sub-operands in AsmMatcherEmitter 2013-04-27 18:48:23 +00:00
AsmWriterEmitter.cpp This patch that sets the EmitAlias flag in td files 2013-02-05 08:32:10 +00:00
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CMakeLists.txt Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp Allow types to be omitted in output patterns. 2013-03-24 19:37:00 +00:00
CodeGenDAGPatterns.h Make all unnamed RegisterClass TreePatternNodes typed MVT::i32. 2013-03-23 18:08:44 +00:00
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenMapTable.cpp Fix for bug 15246 -- out-of-bound error in the TableGen backend, CodeGenMapTable.cpp. 2013-02-14 17:58:13 +00:00
CodeGenRegisters.cpp Improve the compression of the tablegen DiffLists by introducing a new sort 2013-06-27 19:38:13 +00:00
CodeGenRegisters.h Make SubRegIndex size mandatory, following r183020. 2013-05-31 23:45:26 +00:00
CodeGenSchedule.cpp Support BufferSize on ProcResGroup for unified MOp schedulers. 2013-06-15 04:50:06 +00:00
CodeGenSchedule.h Support BufferSize on ProcResGroup for unified MOp schedulers. 2013-06-15 04:50:06 +00:00
CodeGenTarget.cpp Use ArrayRef<MVT::SimpleValueType> when possible. 2013-03-17 17:26:09 +00:00
CodeGenTarget.h Use ArrayRef<MVT::SimpleValueType> when possible. 2013-03-17 17:26:09 +00:00
CTagsEmitter.cpp Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp Fix comments 2013-02-05 16:53:11 +00:00
DAGISelMatcherGen.cpp Allow types to be omitted in output patterns. 2013-03-24 19:37:00 +00:00
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
FastISelEmitter.cpp Recognize ValueType operands in source patterns for fast-isel. 2013-05-22 20:45:11 +00:00
FixedLenDecoderEmitter.cpp
InstrInfoEmitter.cpp TableGen: Generate a function for getting operand indices based on their defined names 2013-06-25 21:22:09 +00:00
IntrinsicEmitter.cpp
LLVMBuild.txt
Makefile
OptParserEmitter.cpp
PseudoLoweringEmitter.cpp PR14992 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIA 2013-02-13 19:21:47 +00:00
RegisterInfoEmitter.cpp Improve the compression of the tablegen DiffLists by introducing a new sort 2013-06-27 19:38:13 +00:00
SequenceToOffsetTable.h
SetTheory.cpp
SetTheory.h
StringToOffsetTable.h
SubtargetEmitter.cpp Support BufferSize on ProcResGroup for unified MOp schedulers. 2013-06-15 04:50:06 +00:00
TableGen.cpp Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
TableGenBackends.h Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
tdtags Add TableGen ctags(1) emitter and helper script. 2013-03-21 23:40:38 +00:00
TGValueTypes.cpp
X86DisassemblerShared.h
X86DisassemblerTables.cpp
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp Add support for encoding the HLE XACQUIRE and XRELEASE prefixes. 2013-06-18 17:08:10 +00:00
X86RecognizableInstr.h