Duraid Madina c5f247089c click click ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25459 91177308-0d34-0410-b5e6-96231b3b80d8

2006-01-19 14:13:11 +00:00

..

Alpha

fix short immediate loads

2006-01-16 21:41:39 +00:00

CBackend

yet more C++ standards-compliance stuff.

2005-12-27 10:40:34 +00:00

IA64

click click

2006-01-19 14:13:11 +00:00

PowerPC

add a note

2006-01-19 02:09:38 +00:00

Skeleton

Support multiple ValueTypes per RegisterClass, needed for upcoming vector

2005-12-01 04:51:06 +00:00

Sparc

implement support for f32 arguments past the first 6 words

2006-01-19 07:22:29 +00:00

SparcV8

implement support for f32 arguments past the first 6 words

2006-01-19 07:22:29 +00:00

SparcV9

Support multiple ValueTypes per RegisterClass, needed for upcoming vector

2005-12-01 04:51:06 +00:00

X86

Avoid generating a redundant setcc.

2006-01-19 08:52:46 +00:00

Makefile

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MRegisterInfo.cpp

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SubtargetFeature.cpp

Preparation of supporting scheduling info. Need to find info based on selected

2005-10-25 15:15:28 +00:00

Target.td

New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace

2006-01-09 18:28:21 +00:00

TargetData.cpp

Implement a new InvalidateStructLayoutInfo method and add some comments

2006-01-14 00:07:34 +00:00

TargetFrameInfo.cpp

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TargetInstrInfo.cpp

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TargetMachine.cpp

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TargetMachineRegistry.cpp

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TargetSchedInfo.cpp

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TargetSchedule.td

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TargetSelectionDAG.td

bswap implementation

2006-01-14 03:14:10 +00:00

TargetSubtarget.cpp

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