llvm-6502/lib/Target/NVPTX/CMakeLists.txt
Justin Holewinski 5443e7d790 [NVPTX] Re-enable support for virtual registers in the final output
Now that 3.3 is branched, we are re-enabling virtual registers to help
iron out bugs before the next release. Some of the post-RA passes do
not play well with virtual registers, so we disable them for now. The
needed functionality of the PrologEpilogInserter pass is copied to a
new backend-specific NVPTXPrologEpilog pass.

The test for this commit is not breaking the existing tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182998 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-31 12:14:49 +00:00

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956 B
CMake

set(LLVM_TARGET_DEFINITIONS NVPTX.td)
tablegen(LLVM NVPTXGenRegisterInfo.inc -gen-register-info)
tablegen(LLVM NVPTXGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM NVPTXGenAsmWriter.inc -gen-asm-writer)
tablegen(LLVM NVPTXGenDAGISel.inc -gen-dag-isel)
tablegen(LLVM NVPTXGenSubtargetInfo.inc -gen-subtarget)
add_public_tablegen_target(NVPTXCommonTableGen)
set(NVPTXCodeGen_sources
NVPTXFrameLowering.cpp
NVPTXInstrInfo.cpp
NVPTXISelDAGToDAG.cpp
NVPTXISelLowering.cpp
NVPTXRegisterInfo.cpp
NVPTXSubtarget.cpp
NVPTXTargetMachine.cpp
NVPTXSplitBBatBar.cpp
NVPTXLowerAggrCopies.cpp
NVPTXutil.cpp
NVPTXAllocaHoisting.cpp
NVPTXAsmPrinter.cpp
NVPTXUtilities.cpp
NVVMReflect.cpp
NVPTXGenericToNVVM.cpp
NVPTXPrologEpilogPass.cpp
)
add_llvm_target(NVPTXCodeGen ${NVPTXCodeGen_sources})
add_dependencies(LLVMNVPTXCodeGen intrinsics_gen)
add_subdirectory(TargetInfo)
add_subdirectory(InstPrinter)
add_subdirectory(MCTargetDesc)