Misha Brukman c681a4e476 Replace patterns 0, 4, and 5 with simpler heirarchical definitions that use the ... official PowerPC instruction format lingo: X- and D-form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15422 91177308-0d34-0410-b5e6-96231b3b80d8		2004-08-02 21:56:35 +00:00
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CBackend	Temporarily disable this code, as it is emitting LLVM_NAN("nan") which results in a call to the	2004-07-25 22:36:35 +00:00
PowerPC	Replace patterns 0, 4, and 5 with simpler heirarchical definitions that use the	2004-08-02 21:56:35 +00:00
Skeleton	Fix grammar.	2004-07-16 17:40:28 +00:00
Sparc	I'm pretty sure that ba is branch always, which is a barrier. Brg should	2004-07-31 02:24:37 +00:00
SparcV8	I'm pretty sure that ba is branch always, which is a barrier. Brg should	2004-07-31 02:24:37 +00:00
SparcV9	Add #include <cstdlib> and abort() to silence a warning	2004-08-02 14:02:21 +00:00
X86	Fix a warning	2004-08-01 19:31:30 +00:00
Makefile	Build the skeleton target	2004-07-16 07:11:53 +00:00
MRegisterInfo.cpp	Put all LLVM code into the llvm namespace, as per bug 109.	2003-11-11 22:41:34 +00:00
Target.td	Add some immediate forms, make name optional	2004-08-01 09:36:44 +00:00
TargetData.cpp	* Add BoolAlignment to TargetData, default is 1 byte, size 1 byte	2004-07-23 01:09:52 +00:00
TargetFrameInfo.cpp	Move implementations of functions here, which avoids #including <cstdlib> in the	2004-03-11 23:52:43 +00:00
TargetInstrInfo.cpp	ConstantTypeMustBeLoaded has been incorporated into SparcV9PreSelection, its	2004-07-27 21:43:38 +00:00
TargetMachine.cpp	* Add BoolAlignment to TargetData, default is 1 byte, size 1 byte	2004-07-23 01:09:52 +00:00
TargetMachineRegistry.cpp	Implement TargetRegistrationListener	2004-07-11 06:03:21 +00:00
TargetSchedInfo.cpp	Adjust to new TM interface	2004-06-02 05:56:04 +00:00