mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 02:29:18 +00:00
System z branches have a mask to select which of the 4 CC values should cause the branch to be taken. We can invert a branch by inverting the mask. However, not all instructions can produce all 4 CC values, so inverting the branch like this can lead to some oddities. For example, integer comparisons only produce a CC of 0 (equal), 1 (less) or 2 (greater). If an integer EQ is reversed to NE before instruction selection, the branch will test for 1 or 2. If instead the branch is reversed after instruction selection (by inverting the mask), it will test for 1, 2 or 3. Both are correct, but the second isn't really canonical. This patch therefore keeps track of which CC values are possible and uses this when inverting a mask. Although this is mostly cosmestic, it fixes undefined behavior for the CIJNLH in branch-08.ll. Another fix would have been to mask out bit 0 when generating the fused compare and branch, but the point of this patch is that we shouldn't need to do that in the first place. The patch also makes it easier to reuse CC results from other instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187495 91177308-0d34-0410-b5e6-96231b3b80d8
86 lines
2.0 KiB
LLVM
86 lines
2.0 KiB
LLVM
; Test 32-bit atomic ORs.
|
|
;
|
|
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
|
|
|
|
; Check ORs of a variable.
|
|
define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
|
|
; CHECK-LABEL: f1:
|
|
; CHECK: l %r2, 0(%r3)
|
|
; CHECK: [[LABEL:\.[^ ]*]]:
|
|
; CHECK: lr %r0, %r2
|
|
; CHECK: or %r0, %r4
|
|
; CHECK: cs %r2, %r0, 0(%r3)
|
|
; CHECK: jl [[LABEL]]
|
|
; CHECK: br %r14
|
|
%res = atomicrmw or i32 *%src, i32 %b seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check the lowest useful OILL value.
|
|
define i32 @f2(i32 %dummy, i32 *%src) {
|
|
; CHECK-LABEL: f2:
|
|
; CHECK: l %r2, 0(%r3)
|
|
; CHECK: [[LABEL:\.[^ ]*]]:
|
|
; CHECK: lr %r0, %r2
|
|
; CHECK: oill %r0, 1
|
|
; CHECK: cs %r2, %r0, 0(%r3)
|
|
; CHECK: jl [[LABEL]]
|
|
; CHECK: br %r14
|
|
%res = atomicrmw or i32 *%src, i32 1 seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check the high end of the OILL range.
|
|
define i32 @f3(i32 %dummy, i32 *%src) {
|
|
; CHECK-LABEL: f3:
|
|
; CHECK: oill %r0, 65535
|
|
; CHECK: br %r14
|
|
%res = atomicrmw or i32 *%src, i32 65535 seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check the lowest useful OILH value, which is the next value up.
|
|
define i32 @f4(i32 %dummy, i32 *%src) {
|
|
; CHECK-LABEL: f4:
|
|
; CHECK: oilh %r0, 1
|
|
; CHECK: br %r14
|
|
%res = atomicrmw or i32 *%src, i32 65536 seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check the lowest useful OILF value, which is the next value up.
|
|
define i32 @f5(i32 %dummy, i32 *%src) {
|
|
; CHECK-LABEL: f5:
|
|
; CHECK: oilf %r0, 65537
|
|
; CHECK: br %r14
|
|
%res = atomicrmw or i32 *%src, i32 65537 seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check the high end of the OILH range.
|
|
define i32 @f6(i32 %dummy, i32 *%src) {
|
|
; CHECK-LABEL: f6:
|
|
; CHECK: oilh %r0, 65535
|
|
; CHECK: br %r14
|
|
%res = atomicrmw or i32 *%src, i32 -65536 seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check the next value up, which must use OILF.
|
|
define i32 @f7(i32 %dummy, i32 *%src) {
|
|
; CHECK-LABEL: f7:
|
|
; CHECK: oilf %r0, 4294901761
|
|
; CHECK: br %r14
|
|
%res = atomicrmw or i32 *%src, i32 -65535 seq_cst
|
|
ret i32 %res
|
|
}
|
|
|
|
; Check the largest useful OILF value.
|
|
define i32 @f8(i32 %dummy, i32 *%src) {
|
|
; CHECK-LABEL: f8:
|
|
; CHECK: oilf %r0, 4294967294
|
|
; CHECK: br %r14
|
|
%res = atomicrmw or i32 *%src, i32 -2 seq_cst
|
|
ret i32 %res
|
|
}
|