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https://github.com/c64scene-ar/llvm-6502.git
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cf0fa9b9dd
The z13 vector facility includes some instructions that operate only on the high f64 in a v2f64, effectively extending the FP register set from 16 to 32 registers. It's still better to use the old instructions if the operands happen to fit though, since the older instructions have a shorter encoding. Based on a patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236524 91177308-0d34-0410-b5e6-96231b3b80d8
250 lines
9.3 KiB
LLVM
250 lines
9.3 KiB
LLVM
; Test the saving and restoring of FPRs in large frames.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck -check-prefix=CHECK-NOFP %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 -disable-fp-elim | FileCheck -check-prefix=CHECK-FP %s
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; Test a frame size that requires some FPRs to be saved and loaded using
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; the 20-bit STDY and LDY while others can use the 12-bit STD and LD.
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; The frame is big enough to require two emergency spill slots at 160(%r15),
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; as well as the 8 FPR save slots. Get a frame of size 4128 by allocating
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; (4128 - 176 - 8 * 8) / 8 = 486 extra doublewords.
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define void @f1(double *%ptr, i64 %x) {
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; CHECK-NOFP-LABEL: f1:
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; CHECK-NOFP: aghi %r15, -4128
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; CHECK-NOFP: .cfi_def_cfa_offset 4288
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; CHECK-NOFP: stdy %f8, 4120(%r15)
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; CHECK-NOFP: stdy %f9, 4112(%r15)
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; CHECK-NOFP: stdy %f10, 4104(%r15)
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; CHECK-NOFP: stdy %f11, 4096(%r15)
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; CHECK-NOFP: std %f12, 4088(%r15)
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; CHECK-NOFP: std %f13, 4080(%r15)
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; CHECK-NOFP: std %f14, 4072(%r15)
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; CHECK-NOFP: std %f15, 4064(%r15)
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; CHECK-NOFP: .cfi_offset %f8, -168
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; CHECK-NOFP: .cfi_offset %f9, -176
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; CHECK-NOFP: .cfi_offset %f10, -184
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; CHECK-NOFP: .cfi_offset %f11, -192
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; CHECK-NOFP: .cfi_offset %f12, -200
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; CHECK-NOFP: .cfi_offset %f13, -208
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; CHECK-NOFP: .cfi_offset %f14, -216
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; CHECK-NOFP: .cfi_offset %f15, -224
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; ...main function body...
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; CHECK-NOFP: ldy %f8, 4120(%r15)
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; CHECK-NOFP: ldy %f9, 4112(%r15)
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; CHECK-NOFP: ldy %f10, 4104(%r15)
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; CHECK-NOFP: ldy %f11, 4096(%r15)
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; CHECK-NOFP: ld %f12, 4088(%r15)
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; CHECK-NOFP: ld %f13, 4080(%r15)
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; CHECK-NOFP: ld %f14, 4072(%r15)
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; CHECK-NOFP: ld %f15, 4064(%r15)
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; CHECK-NOFP: aghi %r15, 4128
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f1:
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; CHECK-FP: stmg %r11, %r15, 88(%r15)
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; CHECK-FP: aghi %r15, -4128
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; CHECK-FP: .cfi_def_cfa_offset 4288
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; CHECK-FP: lgr %r11, %r15
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; CHECK-FP: .cfi_def_cfa_register %r11
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; CHECK-FP: stdy %f8, 4120(%r11)
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; CHECK-FP: stdy %f9, 4112(%r11)
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; CHECK-FP: stdy %f10, 4104(%r11)
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; CHECK-FP: stdy %f11, 4096(%r11)
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; CHECK-FP: std %f12, 4088(%r11)
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; CHECK-FP: std %f13, 4080(%r11)
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; CHECK-FP: std %f14, 4072(%r11)
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; CHECK-FP: std %f15, 4064(%r11)
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; ...main function body...
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; CHECK-FP: ldy %f8, 4120(%r11)
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; CHECK-FP: ldy %f9, 4112(%r11)
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; CHECK-FP: ldy %f10, 4104(%r11)
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; CHECK-FP: ldy %f11, 4096(%r11)
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; CHECK-FP: ld %f12, 4088(%r11)
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; CHECK-FP: ld %f13, 4080(%r11)
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; CHECK-FP: ld %f14, 4072(%r11)
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; CHECK-FP: ld %f15, 4064(%r11)
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; CHECK-FP: lmg %r11, %r15, 4216(%r11)
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; CHECK-FP: br %r14
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%y = alloca [486 x i64], align 8
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%elem = getelementptr inbounds [486 x i64], [486 x i64]* %y, i64 0, i64 0
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store volatile i64 %x, i64* %elem
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%l0 = load volatile double , double *%ptr
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%l1 = load volatile double , double *%ptr
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%l2 = load volatile double , double *%ptr
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%l3 = load volatile double , double *%ptr
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%l4 = load volatile double , double *%ptr
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%l5 = load volatile double , double *%ptr
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%l6 = load volatile double , double *%ptr
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%l7 = load volatile double , double *%ptr
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%l8 = load volatile double , double *%ptr
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%l9 = load volatile double , double *%ptr
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%l10 = load volatile double , double *%ptr
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%l11 = load volatile double , double *%ptr
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%l12 = load volatile double , double *%ptr
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%l13 = load volatile double , double *%ptr
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%l14 = load volatile double , double *%ptr
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%l15 = load volatile double , double *%ptr
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%add0 = fadd double %l0, %l0
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%add1 = fadd double %l1, %add0
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%add2 = fadd double %l2, %add1
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%add3 = fadd double %l3, %add2
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%add4 = fadd double %l4, %add3
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%add5 = fadd double %l5, %add4
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%add6 = fadd double %l6, %add5
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%add7 = fadd double %l7, %add6
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%add8 = fadd double %l8, %add7
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%add9 = fadd double %l9, %add8
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%add10 = fadd double %l10, %add9
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%add11 = fadd double %l11, %add10
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%add12 = fadd double %l12, %add11
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%add13 = fadd double %l13, %add12
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%add14 = fadd double %l14, %add13
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%add15 = fadd double %l15, %add14
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store volatile double %add0, double *%ptr
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store volatile double %add1, double *%ptr
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store volatile double %add2, double *%ptr
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store volatile double %add3, double *%ptr
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store volatile double %add4, double *%ptr
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store volatile double %add5, double *%ptr
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store volatile double %add6, double *%ptr
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store volatile double %add7, double *%ptr
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store volatile double %add8, double *%ptr
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store volatile double %add9, double *%ptr
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store volatile double %add10, double *%ptr
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store volatile double %add11, double *%ptr
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store volatile double %add12, double *%ptr
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store volatile double %add13, double *%ptr
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store volatile double %add14, double *%ptr
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store volatile double %add15, double *%ptr
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ret void
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}
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; Test a frame size that requires some FPRs to be saved and loaded using
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; an indexed STD and LD while others can use the 20-bit STDY and LDY.
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; The index can be any call-clobbered GPR except %r0.
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;
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; Don't require the accesses to share the same LLILH; that would be a
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; good optimisation but is really a different test.
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;
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; As above, get a frame of size 524320 by allocating
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; (524320 - 176 - 8 * 8) / 8 = 65510 extra doublewords.
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define void @f2(double *%ptr, i64 %x) {
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; CHECK-NOFP-LABEL: f2:
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; CHECK-NOFP: agfi %r15, -524320
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; CHECK-NOFP: .cfi_def_cfa_offset 524480
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; CHECK-NOFP: llilh [[INDEX:%r[1-5]]], 8
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; CHECK-NOFP: std %f8, 24([[INDEX]],%r15)
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; CHECK-NOFP: std %f9, 16({{%r[1-5]}},%r15)
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; CHECK-NOFP: std %f10, 8({{%r[1-5]}},%r15)
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; CHECK-NOFP: std %f11, 0({{%r[1-5]}},%r15)
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; CHECK-NOFP: stdy %f12, 524280(%r15)
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; CHECK-NOFP: stdy %f13, 524272(%r15)
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; CHECK-NOFP: stdy %f14, 524264(%r15)
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; CHECK-NOFP: stdy %f15, 524256(%r15)
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; CHECK-NOFP: .cfi_offset %f8, -168
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; CHECK-NOFP: .cfi_offset %f9, -176
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; CHECK-NOFP: .cfi_offset %f10, -184
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; CHECK-NOFP: .cfi_offset %f11, -192
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; CHECK-NOFP: .cfi_offset %f12, -200
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; CHECK-NOFP: .cfi_offset %f13, -208
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; CHECK-NOFP: .cfi_offset %f14, -216
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; CHECK-NOFP: .cfi_offset %f15, -224
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; ...main function body...
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; CHECK-NOFP: ld %f8, 24({{%r[1-5]}},%r15)
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; CHECK-NOFP: ld %f9, 16({{%r[1-5]}},%r15)
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; CHECK-NOFP: ld %f10, 8({{%r[1-5]}},%r15)
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; CHECK-NOFP: ld %f11, 0({{%r[1-5]}},%r15)
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; CHECK-NOFP: ldy %f12, 524280(%r15)
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; CHECK-NOFP: ldy %f13, 524272(%r15)
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; CHECK-NOFP: ldy %f14, 524264(%r15)
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; CHECK-NOFP: ldy %f15, 524256(%r15)
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; CHECK-NOFP: agfi %r15, 524320
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; CHECK-NOFP: br %r14
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;
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; CHECK-FP-LABEL: f2:
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; CHECK-FP: stmg %r11, %r15, 88(%r15)
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; CHECK-FP: agfi %r15, -524320
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; CHECK-FP: .cfi_def_cfa_offset 524480
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; CHECK-FP: llilh [[INDEX:%r[1-5]]], 8
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; CHECK-FP: std %f8, 24([[INDEX]],%r11)
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; CHECK-FP: std %f9, 16({{%r[1-5]}},%r11)
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; CHECK-FP: std %f10, 8({{%r[1-5]}},%r11)
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; CHECK-FP: std %f11, 0({{%r[1-5]}},%r11)
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; CHECK-FP: stdy %f12, 524280(%r11)
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; CHECK-FP: stdy %f13, 524272(%r11)
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; CHECK-FP: stdy %f14, 524264(%r11)
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; CHECK-FP: stdy %f15, 524256(%r11)
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; CHECK-FP: .cfi_offset %f8, -168
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; CHECK-FP: .cfi_offset %f9, -176
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; CHECK-FP: .cfi_offset %f10, -184
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; CHECK-FP: .cfi_offset %f11, -192
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; CHECK-FP: .cfi_offset %f12, -200
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; CHECK-FP: .cfi_offset %f13, -208
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; CHECK-FP: .cfi_offset %f14, -216
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; CHECK-FP: .cfi_offset %f15, -224
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; ...main function body...
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; CHECK-FP: ld %f8, 24({{%r[1-5]}},%r11)
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; CHECK-FP: ld %f9, 16({{%r[1-5]}},%r11)
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; CHECK-FP: ld %f10, 8({{%r[1-5]}},%r11)
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; CHECK-FP: ld %f11, 0({{%r[1-5]}},%r11)
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; CHECK-FP: ldy %f12, 524280(%r11)
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; CHECK-FP: ldy %f13, 524272(%r11)
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; CHECK-FP: ldy %f14, 524264(%r11)
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; CHECK-FP: ldy %f15, 524256(%r11)
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; CHECK-FP: aghi %r11, 128
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; CHECK-FP: lmg %r11, %r15, 524280(%r11)
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; CHECK-FP: br %r14
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%y = alloca [65510 x i64], align 8
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%elem = getelementptr inbounds [65510 x i64], [65510 x i64]* %y, i64 0, i64 0
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store volatile i64 %x, i64* %elem
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%l0 = load volatile double , double *%ptr
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%l1 = load volatile double , double *%ptr
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%l2 = load volatile double , double *%ptr
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%l3 = load volatile double , double *%ptr
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%l4 = load volatile double , double *%ptr
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%l5 = load volatile double , double *%ptr
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%l6 = load volatile double , double *%ptr
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%l7 = load volatile double , double *%ptr
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%l8 = load volatile double , double *%ptr
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%l9 = load volatile double , double *%ptr
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%l10 = load volatile double , double *%ptr
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%l11 = load volatile double , double *%ptr
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%l12 = load volatile double , double *%ptr
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%l13 = load volatile double , double *%ptr
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%l14 = load volatile double , double *%ptr
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%l15 = load volatile double , double *%ptr
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%add0 = fadd double %l0, %l0
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%add1 = fadd double %l1, %add0
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%add2 = fadd double %l2, %add1
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%add3 = fadd double %l3, %add2
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%add4 = fadd double %l4, %add3
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%add5 = fadd double %l5, %add4
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%add6 = fadd double %l6, %add5
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%add7 = fadd double %l7, %add6
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%add8 = fadd double %l8, %add7
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%add9 = fadd double %l9, %add8
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%add10 = fadd double %l10, %add9
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%add11 = fadd double %l11, %add10
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%add12 = fadd double %l12, %add11
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%add13 = fadd double %l13, %add12
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%add14 = fadd double %l14, %add13
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%add15 = fadd double %l15, %add14
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store volatile double %add0, double *%ptr
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store volatile double %add1, double *%ptr
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store volatile double %add2, double *%ptr
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store volatile double %add3, double *%ptr
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store volatile double %add4, double *%ptr
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store volatile double %add5, double *%ptr
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store volatile double %add6, double *%ptr
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store volatile double %add7, double *%ptr
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store volatile double %add8, double *%ptr
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store volatile double %add9, double *%ptr
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store volatile double %add10, double *%ptr
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store volatile double %add11, double *%ptr
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store volatile double %add12, double *%ptr
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store volatile double %add13, double *%ptr
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store volatile double %add14, double *%ptr
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store volatile double %add15, double *%ptr
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ret void
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}
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