mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-17 03:30:28 +00:00
18e1185ddf
Checked some corner cases, for example translation of <8 x i1> to <8 x double> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221883 91177308-0d34-0410-b5e6-96231b3b80d8
327 lines
8.9 KiB
LLVM
327 lines
8.9 KiB
LLVM
; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
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; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=knl -cost-model -analyze < %s | FileCheck --check-prefix=AVX512F %s
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define <2 x double> @sitofpv2i8v2double(<2 x i8> %a) {
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; SSE2: sitofpv2i8v2double
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; SSE2: cost of 20 {{.*}} sitofp
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%1 = sitofp <2 x i8> %a to <2 x double>
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ret <2 x double> %1
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}
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define <4 x double> @sitofpv4i8v4double(<4 x i8> %a) {
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; SSE2: sitofpv4i8v4double
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; SSE2: cost of 40 {{.*}} sitofp
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%1 = sitofp <4 x i8> %a to <4 x double>
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ret <4 x double> %1
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}
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define <8 x double> @sitofpv8i8v8double(<8 x i8> %a) {
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; SSE2: sitofpv8i8v8double
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; SSE2: cost of 80 {{.*}} sitofp
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%1 = sitofp <8 x i8> %a to <8 x double>
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ret <8 x double> %1
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}
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define <16 x double> @sitofpv16i8v16double(<16 x i8> %a) {
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; SSE2: sitofpv16i8v16double
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; SSE2: cost of 160 {{.*}} sitofp
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%1 = sitofp <16 x i8> %a to <16 x double>
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ret <16 x double> %1
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}
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define <32 x double> @sitofpv32i8v32double(<32 x i8> %a) {
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; SSE2: sitofpv32i8v32double
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; SSE2: cost of 320 {{.*}} sitofp
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%1 = sitofp <32 x i8> %a to <32 x double>
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ret <32 x double> %1
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}
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define <2 x double> @sitofpv2i16v2double(<2 x i16> %a) {
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; SSE2: sitofpv2i16v2double
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; SSE2: cost of 20 {{.*}} sitofp
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%1 = sitofp <2 x i16> %a to <2 x double>
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ret <2 x double> %1
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}
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define <4 x double> @sitofpv4i16v4double(<4 x i16> %a) {
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; SSE2: sitofpv4i16v4double
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; SSE2: cost of 40 {{.*}} sitofp
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%1 = sitofp <4 x i16> %a to <4 x double>
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ret <4 x double> %1
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}
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define <8 x double> @sitofpv8i16v8double(<8 x i16> %a) {
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; SSE2: sitofpv8i16v8double
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; SSE2: cost of 80 {{.*}} sitofp
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%1 = sitofp <8 x i16> %a to <8 x double>
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ret <8 x double> %1
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}
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define <16 x double> @sitofpv16i16v16double(<16 x i16> %a) {
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; SSE2: sitofpv16i16v16double
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; SSE2: cost of 160 {{.*}} sitofp
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%1 = sitofp <16 x i16> %a to <16 x double>
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ret <16 x double> %1
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}
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define <32 x double> @sitofpv32i16v32double(<32 x i16> %a) {
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; SSE2: sitofpv32i16v32double
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; SSE2: cost of 320 {{.*}} sitofp
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%1 = sitofp <32 x i16> %a to <32 x double>
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ret <32 x double> %1
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}
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define <2 x double> @sitofpv2i32v2double(<2 x i32> %a) {
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; SSE2: sitofpv2i32v2double
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; SSE2: cost of 20 {{.*}} sitofp
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%1 = sitofp <2 x i32> %a to <2 x double>
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ret <2 x double> %1
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}
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define <4 x double> @sitofpv4i32v4double(<4 x i32> %a) {
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; SSE2: sitofpv4i32v4double
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; SSE2: cost of 40 {{.*}} sitofp
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%1 = sitofp <4 x i32> %a to <4 x double>
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ret <4 x double> %1
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}
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define <8 x double> @sitofpv8i32v8double(<8 x i32> %a) {
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; SSE2: sitofpv8i32v8double
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; SSE2: cost of 80 {{.*}} sitofp
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%1 = sitofp <8 x i32> %a to <8 x double>
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ret <8 x double> %1
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}
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define <16 x double> @sitofpv16i32v16double(<16 x i32> %a) {
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; SSE2: sitofpv16i32v16double
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; SSE2: cost of 160 {{.*}} sitofp
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%1 = sitofp <16 x i32> %a to <16 x double>
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ret <16 x double> %1
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}
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define <32 x double> @sitofpv32i32v32double(<32 x i32> %a) {
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; SSE2: sitofpv32i32v32double
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; SSE2: cost of 320 {{.*}} sitofp
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%1 = sitofp <32 x i32> %a to <32 x double>
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ret <32 x double> %1
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}
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define <2 x double> @sitofpv2i64v2double(<2 x i64> %a) {
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; SSE2: sitofpv2i64v2double
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; SSE2: cost of 20 {{.*}} sitofp
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%1 = sitofp <2 x i64> %a to <2 x double>
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ret <2 x double> %1
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}
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define <4 x double> @sitofpv4i64v4double(<4 x i64> %a) {
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; SSE2: sitofpv4i64v4double
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; SSE2: cost of 40 {{.*}} sitofp
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%1 = sitofp <4 x i64> %a to <4 x double>
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ret <4 x double> %1
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}
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define <8 x double> @sitofpv8i64v8double(<8 x i64> %a) {
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%1 = sitofp <8 x i64> %a to <8 x double>
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; SSE2: sitofpv8i64v8double
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; SSE2: cost of 80 {{.*}} sitofp
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ret <8 x double> %1
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}
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define <16 x double> @sitofpv16i64v16double(<16 x i64> %a) {
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; SSE2: sitofpv16i64v16double
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; SSE2: cost of 160 {{.*}} sitofp
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%1 = sitofp <16 x i64> %a to <16 x double>
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ret <16 x double> %1
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}
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define <32 x double> @sitofpv32i64v32double(<32 x i64> %a) {
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; SSE2: sitofpv32i64v32double
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; SSE2: cost of 320 {{.*}} sitofp
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%1 = sitofp <32 x i64> %a to <32 x double>
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ret <32 x double> %1
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}
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define <2 x float> @sitofpv2i8v2float(<2 x i8> %a) {
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; SSE2: sitofpv2i8v2float
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; SSE2: cost of 15 {{.*}} sitofp
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%1 = sitofp <2 x i8> %a to <2 x float>
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ret <2 x float> %1
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}
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define <4 x float> @sitofpv4i8v4float(<4 x i8> %a) {
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; SSE2: sitofpv4i8v4float
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; SSE2: cost of 15 {{.*}} sitofp
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%1 = sitofp <4 x i8> %a to <4 x float>
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ret <4 x float> %1
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}
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define <8 x float> @sitofpv8i8v8float(<8 x i8> %a) {
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; SSE2: sitofpv8i8v8float
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; SSE2: cost of 15 {{.*}} sitofp
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%1 = sitofp <8 x i8> %a to <8 x float>
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ret <8 x float> %1
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}
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define <16 x float> @sitofpv16i8v16float(<16 x i8> %a) {
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; SSE2: sitofpv16i8v16float
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; SSE2: cost of 8 {{.*}} sitofp
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%1 = sitofp <16 x i8> %a to <16 x float>
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ret <16 x float> %1
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}
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define <32 x float> @sitofpv32i8v32float(<32 x i8> %a) {
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; SSE2: sitofpv32i8v32float
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; SSE2: cost of 16 {{.*}} sitofp
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%1 = sitofp <32 x i8> %a to <32 x float>
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ret <32 x float> %1
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}
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define <2 x float> @sitofpv2i16v2float(<2 x i16> %a) {
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; SSE2: sitofpv2i16v2float
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; SSE2: cost of 15 {{.*}} sitofp
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%1 = sitofp <2 x i16> %a to <2 x float>
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ret <2 x float> %1
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}
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define <4 x float> @sitofpv4i16v4float(<4 x i16> %a) {
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; SSE2: sitofpv4i16v4float
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; SSE2: cost of 15 {{.*}} sitofp
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%1 = sitofp <4 x i16> %a to <4 x float>
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ret <4 x float> %1
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}
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define <8 x float> @sitofpv8i16v8float(<8 x i16> %a) {
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; SSE2: sitofpv8i16v8float
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; SSE2: cost of 15 {{.*}} sitofp
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%1 = sitofp <8 x i16> %a to <8 x float>
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ret <8 x float> %1
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}
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define <16 x float> @sitofpv16i16v16float(<16 x i16> %a) {
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; SSE2: sitofpv16i16v16float
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; SSE2: cost of 30 {{.*}} sitofp
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%1 = sitofp <16 x i16> %a to <16 x float>
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ret <16 x float> %1
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}
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define <32 x float> @sitofpv32i16v32float(<32 x i16> %a) {
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; SSE2: sitofpv32i16v32float
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; SSE2: cost of 60 {{.*}} sitofp
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%1 = sitofp <32 x i16> %a to <32 x float>
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ret <32 x float> %1
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}
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define <2 x float> @sitofpv2i32v2float(<2 x i32> %a) {
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; SSE2: sitofpv2i32v2float
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; SSE2: cost of 15 {{.*}} sitofp
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%1 = sitofp <2 x i32> %a to <2 x float>
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ret <2 x float> %1
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}
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define <4 x float> @sitofpv4i32v4float(<4 x i32> %a) {
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; SSE2: sitofpv4i32v4float
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; SSE2: cost of 15 {{.*}} sitofp
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%1 = sitofp <4 x i32> %a to <4 x float>
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ret <4 x float> %1
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}
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define <8 x float> @sitofpv8i32v8float(<8 x i32> %a) {
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; SSE2: sitofpv8i32v8float
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; SSE2: cost of 30 {{.*}} sitofp
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%1 = sitofp <8 x i32> %a to <8 x float>
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ret <8 x float> %1
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}
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define <16 x float> @sitofpv16i32v16float(<16 x i32> %a) {
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; SSE2: sitofpv16i32v16float
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; SSE2: cost of 60 {{.*}} sitofp
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%1 = sitofp <16 x i32> %a to <16 x float>
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ret <16 x float> %1
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}
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define <32 x float> @sitofpv32i32v32float(<32 x i32> %a) {
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; SSE2: sitofpv32i32v32float
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; SSE2: cost of 120 {{.*}} sitofp
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%1 = sitofp <32 x i32> %a to <32 x float>
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ret <32 x float> %1
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}
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define <2 x float> @sitofpv2i64v2float(<2 x i64> %a) {
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; SSE2: sitofpv2i64v2float
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; SSE2: cost of 15 {{.*}} sitofp
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%1 = sitofp <2 x i64> %a to <2 x float>
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ret <2 x float> %1
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}
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define <4 x float> @sitofpv4i64v4float(<4 x i64> %a) {
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; SSE2: sitofpv4i64v4float
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; SSE2: cost of 30 {{.*}} sitofp
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%1 = sitofp <4 x i64> %a to <4 x float>
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ret <4 x float> %1
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}
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define <8 x float> @sitofpv8i64v8float(<8 x i64> %a) {
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; SSE2: sitofpv8i64v8float
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; SSE2: cost of 60 {{.*}} sitofp
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%1 = sitofp <8 x i64> %a to <8 x float>
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ret <8 x float> %1
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}
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define <16 x float> @sitofpv16i64v16float(<16 x i64> %a) {
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; SSE2: sitofpv16i64v16float
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; SSE2: cost of 120 {{.*}} sitofp
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%1 = sitofp <16 x i64> %a to <16 x float>
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ret <16 x float> %1
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}
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define <32 x float> @sitofpv32i64v32float(<32 x i64> %a) {
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; SSE2: sitofpv32i64v32float
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; SSE2: cost of 240 {{.*}} sitofp
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%1 = sitofp <32 x i64> %a to <32 x float>
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ret <32 x float> %1
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}
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; AVX512F-LABEL: sitofp_16i8_float
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; AVX512F: cost of 2 {{.*}} sitofp
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define <16 x float> @sitofp_16i8_float(<16 x i8> %a) {
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%1 = sitofp <16 x i8> %a to <16 x float>
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ret <16 x float> %1
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}
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define <16 x float> @sitofp_16i16_float(<16 x i16> %a) {
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; AVX512F-LABEL: sitofp_16i16_float
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; AVX512F: cost of 2 {{.*}} sitofp
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%1 = sitofp <16 x i16> %a to <16 x float>
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ret <16 x float> %1
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}
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; AVX512F-LABEL: sitofp_8i8_double
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; AVX512F: cost of 2 {{.*}} sitofp
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define <8 x double> @sitofp_8i8_double(<8 x i8> %a) {
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%1 = sitofp <8 x i8> %a to <8 x double>
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ret <8 x double> %1
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}
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; AVX512F-LABEL: sitofp_8i16_double
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; AVX512F: cost of 2 {{.*}} sitofp
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define <8 x double> @sitofp_8i16_double(<8 x i16> %a) {
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%1 = sitofp <8 x i16> %a to <8 x double>
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ret <8 x double> %1
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}
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; AVX512F-LABEL: sitofp_8i1_double
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; AVX512F: cost of 4 {{.*}} sitofp
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define <8 x double> @sitofp_8i1_double(<8 x double> %a) {
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%cmpres = fcmp ogt <8 x double> %a, zeroinitializer
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%1 = sitofp <8 x i1> %cmpres to <8 x double>
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ret <8 x double> %1
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}
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; AVX512F-LABEL: sitofp_16i1_float
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; AVX512F: cost of 3 {{.*}} sitofp
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define <16 x float> @sitofp_16i1_float(<16 x float> %a) {
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%cmpres = fcmp ogt <16 x float> %a, zeroinitializer
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%1 = sitofp <16 x i1> %cmpres to <16 x float>
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ret <16 x float> %1
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}
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