Jim Grosbach c73d73eb88 ARM Allow 'q' registers in VLD/VST vector lists. ... Just treat it as if the constituent D registers where specified. rdar://10348896 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143167 91177308-0d34-0410-b5e6-96231b3b80d8		2011-10-28 00:06:50 +00:00
..
Analysis	Reapply commit 143028 with a fix: the problem was casting a ConstantExpr Mul	2011-10-27 19:16:21 +00:00
Archive	Rewrite the CMake build to use explicit dependencies between libraries,	2011-07-29 00:14:25 +00:00
AsmParser	LLLexer: Factor hex char parsing.	2011-10-27 14:08:01 +00:00
Bitcode	Also update the EH with bitcode. I missed this earlier. Thanks to Duncan for pointing it out.	2011-10-05 07:04:14 +00:00
CodeGen	Teach our Dwarf emission to use the string pool.	2011-10-27 06:44:11 +00:00
DebugInfo	lib/DebugInfo/DWARFDebugLine.cpp: De-Unicode-ify.	2011-10-08 11:22:47 +00:00
ExecutionEngine	Adding dependencies to allow -DBUILD_SHARED_LIBS=true to complete.	2011-10-19 00:13:13 +00:00
Linker	Allow the source module to be materialized during the linking process.	2011-10-14 22:17:46 +00:00
MC	Teach our Dwarf emission to use the string pool.	2011-10-27 06:44:11 +00:00
Object	If we're searching for a symbol reference to pretty-print a scattered relocation address, and we don't find a symbol table entry, try section begin addresses as well.	2011-10-27 21:53:50 +00:00
Support	Remove the Alpha backend.	2011-10-27 22:56:32 +00:00
TableGen	Implement Paste	2011-10-19 13:04:43 +00:00
Target	ARM Allow 'q' registers in VLD/VST vector lists.	2011-10-28 00:06:50 +00:00
Transforms	It is not safe to sink an alloca into a stacksave/stackrestore pair, so don't do that. <rdar://problem/10352360>	2011-10-27 01:33:51 +00:00
VMCore	Add a pinned metadata name for fpaccuracy, and document it	2011-10-27 19:19:14 +00:00
CMakeLists.txt	Move TableGen's parser and entry point into a library	2011-10-01 16:41:13 +00:00
Makefile	Remove more of llvmc and dependencies.	2011-09-20 00:34:27 +00:00