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llvm-6502/lib/Target/XCore
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Rafael Espindola 26c8dcc692 Always compute all the bits in ComputeMaskedBits. 
This allows us to keep passing reduced masks to SimplifyDemandedBits, but
know about all the bits if SimplifyDemandedBits fails. This allows instcombine
to simplify cases like the one in the included testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154011 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-04 12:51:34 +00:00
..
MCTargetDesc Prune some includes 2012-03-27 07:54:11 +00:00
TargetInfo
CMakeLists.txt Fix up the CMake build for the new files added in r146960, they're 2011-12-20 08:42:11 +00:00
LLVMBuild.txt
Makefile
README.txt
XCore.h
XCore.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreAsmPrinter.cpp
XCoreCallingConv.td
XCoreFrameLowering.cpp Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
XCoreFrameLowering.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreInstrFormats.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreInstrInfo.cpp Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
XCoreInstrInfo.h Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
XCoreInstrInfo.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreISelDAGToDAG.cpp
XCoreISelLowering.cpp Always compute all the bits in ComputeMaskedBits. 2012-04-04 12:51:34 +00:00
XCoreISelLowering.h Always compute all the bits in ComputeMaskedBits. 2012-04-04 12:51:34 +00:00
XCoreMachineFunctionInfo.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreMachineFunctionInfo.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreRegisterInfo.cpp Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
XCoreRegisterInfo.h Remove unused functions getArgRegs and getNumArgRegs. 2012-03-11 06:46:40 +00:00
XCoreRegisterInfo.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreSelectionDAGInfo.cpp
XCoreSelectionDAGInfo.h
XCoreSubtarget.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreSubtarget.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
XCoreTargetMachine.cpp TargetPassConfig: confine the MC configuration to TargetMachine. 2012-02-04 02:56:59 +00:00
XCoreTargetMachine.h Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
XCoreTargetObjectFile.cpp
XCoreTargetObjectFile.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00

README.txt 

To-do
-----

* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins