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c76909abfe
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions. This eliminates MachineInstr's std::list member and allows the data to be created by isel and live for the remainder of codegen, avoiding a lot of copying and unnecessary translation. This also shrinks MemSDNode. - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated fields for MachineMemOperands. - Change MemSDNode to have a MachineMemOperand member instead of its own fields with the same information. This introduces some redundancy, but it's more consistent with what MachineInstr will eventually want. - Ignore alignment when searching for redundant loads for CSE, but remember the greatest alignment. Target-specific code which previously used MemOperandSDNodes with generic SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range so that the SelectionDAG framework knows that MachineMemOperand information is available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
CallingConvLower.cpp | ||
CMakeLists.txt | ||
DAGCombiner.cpp | ||
FastISel.cpp | ||
LegalizeDAG.cpp | ||
LegalizeFloatTypes.cpp | ||
LegalizeIntegerTypes.cpp | ||
LegalizeTypes.cpp | ||
LegalizeTypes.h | ||
LegalizeTypesGeneric.cpp | ||
LegalizeVectorOps.cpp | ||
LegalizeVectorTypes.cpp | ||
Makefile | ||
ScheduleDAGFast.cpp | ||
ScheduleDAGList.cpp | ||
ScheduleDAGRRList.cpp | ||
ScheduleDAGSDNodes.cpp | ||
ScheduleDAGSDNodes.h | ||
ScheduleDAGSDNodesEmit.cpp | ||
SelectionDAG.cpp | ||
SelectionDAGBuild.cpp | ||
SelectionDAGBuild.h | ||
SelectionDAGISel.cpp | ||
SelectionDAGPrinter.cpp | ||
TargetLowering.cpp |