llvm-6502/test/CodeGen/Hexagon
Jan Vesely a017ce21ba Revert revisions r234755, r234759, r234760
Revert "Remove default in fully-covered switch (to fix Clang -Werror -Wcovered-switch-default)"
Revert "R600: Add carry and borrow instructions. Use them to implement UADDO/USUBO"
Revert "LegalizeDAG: Try to use Overflow operations when expanding ADD/SUB"

Using overflow operations fails CodeGen/Generic/2011-07-07-ScheduleDAGCrash.ll
on hexagon, nvptx, and r600. Revert while I investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234768 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-13 17:47:15 +00:00
..
intrinsics
vect [Hexagon] Add support for vector instructions 2015-03-19 16:33:08 +00:00
absaddr-store.ll
absimm.ll
adde.ll Revert revisions r234755, r234759, r234760 2015-04-13 17:47:15 +00:00
always-ext.ll
args.ll
ashift-left-right.ll
block-addr.ll
BranchPredict.ll
brev_ld.ll [Hexagon] Intrinsics for circular and bit-reversed loads and stores 2015-03-18 16:23:44 +00:00
brev_st.ll [Hexagon] Intrinsics for circular and bit-reversed loads and stores 2015-03-18 16:23:44 +00:00
cext-check.ll
cext-valid-packet1.ll
cext-valid-packet2.ll
circ_ld.ll [Hexagon] Intrinsics for circular and bit-reversed loads and stores 2015-03-18 16:23:44 +00:00
circ_ldd_bug.ll [Hexagon] Intrinsics for circular and bit-reversed loads and stores 2015-03-18 16:23:44 +00:00
circ_ldw.ll [Hexagon] Intrinsics for circular and bit-reversed loads and stores 2015-03-18 16:23:44 +00:00
circ_st.ll [Hexagon] Intrinsics for circular and bit-reversed loads and stores 2015-03-18 16:23:44 +00:00
clr_set_toggle.ll Missed testcase for r232577 2015-03-18 00:44:46 +00:00
cmp_pred2.ll
cmp_pred_reg.ll [Hexagon] Eliminating immediate condition set. 2015-03-09 19:57:18 +00:00
cmp_pred.ll [Hexagon] Eliminating immediate condition set. 2015-03-09 19:57:18 +00:00
cmp-to-genreg.ll
cmp-to-predreg.ll
cmpb_pred.ll [Hexagon] Eliminating immediate condition set. 2015-03-09 19:57:18 +00:00
combine_ir.ll
combine.ll
convertdptoint.ll
convertdptoll.ll
convertsptoint.ll
convertsptoll.ll
ctlz-cttz-ctpop.ll
ctor.ll
dadd.ll
dmul.ll
double.ll
doubleconvert-ieee-rnd-near.ll
dsub.ll
dualstore.ll
expand-condsets-basic.ll Expand MUX instructions early on Hexagon 2015-03-31 13:35:12 +00:00
expand-condsets-rm-segment.ll Expand MUX instructions early on Hexagon 2015-03-31 13:35:12 +00:00
expand-condsets-undef.ll Expand MUX instructions early on Hexagon 2015-03-31 13:35:12 +00:00
extload-combine.ll
fadd.ll
fcmp.ll
float.ll
floatconvert-ieee-rnd-near.ll
fmul.ll
frame.ll
fsub.ll
fusedandshift.ll
gp-plus-offset-load.ll [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
gp-plus-offset-store.ll [opaque pointer type] Add textual IR support for explicit type parameter to gep operator 2015-03-13 18:20:45 +00:00
gp-rel.ll
hwloop-cleanup.ll [Hexagon] Handle ENDLOOP0 in InsertBranch and RemoveBranch 2015-03-18 15:56:43 +00:00
hwloop-const.ll
hwloop-dbg.ll DebugInfo: Move new hierarchy into place 2015-03-03 17:24:31 +00:00
hwloop-le.ll
hwloop-lt1.ll
hwloop-lt.ll
hwloop-ne.ll
i1_VarArg.ll
i8_VarArg.ll
i16_VarArg.ll
idxload-with-zero-offset.ll
indirect-br.ll
lit.local.cfg
macint.ll
memops1.ll
memops2.ll
memops3.ll
memops.ll
misaligned-access.ll
mpy.ll
newvaluejump2.ll
newvaluejump.ll
newvaluestore.ll
opt-fabs.ll
opt-fneg.ll
packetize_cond_inst.ll
postinc-load.ll
postinc-store.ll
pred-absolute-store.ll [Hexagon] Removing unused patterns. 2015-03-09 23:08:46 +00:00
pred-gp.ll
pred-instrs.ll
predicate-copy.ll
remove_lsr.ll
simpletailcall.ll
split-const32-const64.ll
static.ll
struct_args_large.ll [Hexagon] Reapply r231699. Remove assumption that second operand is an immediate when checking if A2_tfrsi is combinable. 2015-03-09 21:48:13 +00:00
struct_args.ll
sube.ll Revert revisions r234755, r234759, r234760 2015-04-13 17:47:15 +00:00
tail-call-mem-intrinsics.ll Allow memory intrinsics to be tail calls 2015-04-13 17:16:45 +00:00
tail-call-trunc.ll
tfr-to-combine.ll
union-1.ll Remove unused complex patterns for addressing modes on Hexagon. 2015-03-12 16:44:50 +00:00
vaddh.ll
validate-offset.ll
zextloadi1.ll