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llvm-6502/test/CodeGen/CellSPU/i8ops.ll
Scott Michel 31aa1a1c83 CellSPU:
- Add an 8-bit operation test, which doesn't do much at this point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61665 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-05 01:35:22 +00:00

26 lines
567 B
LLVM

; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
; ModuleID = 'i8ops.bc'
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu"
define i8 @add_i8(i8 %a, i8 %b) nounwind {
%1 = add i8 %a, %b
ret i8 %1
}
define i8 @add_i8_imm(i8 %a, i8 %b) nounwind {
%1 = add i8 %a, 15
ret i8 %1
}
define i8 @sub_i8(i8 %a, i8 %b) nounwind {
%1 = sub i8 %a, %b
ret i8 %1
}
define i8 @sub_i8_imm(i8 %a, i8 %b) nounwind {
%1 = sub i8 %a, 15
ret i8 %1
}