llvm-6502/test/CodeGen
Amara Emerson b42574a1f2 [ARM] Enable FeatureMP for Cortex-A5 by default.
Patch by Oliver Stannard.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195640 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 13:17:15 +00:00
..
AArch64
ARM [ARM] Enable FeatureMP for Cortex-A5 by default. 2013-11-25 13:17:15 +00:00
CPP
Generic
Hexagon Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Inputs Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Mips Fixed tryFoldToZero() for vector types that need expansion. 2013-11-25 11:14:43 +00:00
MSP430
NVPTX
PowerPC Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
R600 R600/SI: Fixing handling of condition codes 2013-11-22 23:07:58 +00:00
SPARC [Sparc] Emit large negative adjustments to SP/FP with sethi+xor instead of sethi+or. This generates correct code for both sparc32 and sparc64. 2013-11-24 20:23:25 +00:00
SystemZ
Thumb Debug Info: update testing cases to specify the debug info version number. 2013-11-22 21:49:45 +00:00
Thumb2
X86 Revert r195599 as it broke the builds. 2013-11-25 11:24:18 +00:00
XCore