mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-23 15:29:51 +00:00
f6a4d3c2f3
Add a avoidWriteAfterWrite() target hook to identify register classes that suffer from write-after-write hazards. For those register classes, try to avoid writing the same register in two consecutive instructions. This is currently disabled by default. We should not spill to avoid hazards! The command line flag -avoid-waw-hazard can be used to enable waw avoidance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129772 91177308-0d34-0410-b5e6-96231b3b80d8
24 lines
645 B
LLVM
24 lines
645 B
LLVM
; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
|
|
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0
|
|
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
|
|
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
|
|
|
|
define float @test(float %a, float %b) {
|
|
entry:
|
|
%0 = fdiv float %a, %b
|
|
ret float %0
|
|
}
|
|
|
|
; VFP2: test:
|
|
; VFP2: vdiv.f32 s0, s1, s0
|
|
|
|
; NFP1: test:
|
|
; NFP1: vdiv.f32 s0, s1, s0
|
|
; NFP0: test:
|
|
; NFP0: vdiv.f32 s0, s1, s0
|
|
|
|
; CORTEXA8: test:
|
|
; CORTEXA8: vdiv.f32 s0, s1, s0
|
|
; CORTEXA9: test:
|
|
; CORTEXA9: vdiv.f32 s{{.}}, s{{.}}, s{{.}}
|