Chad Rosier c82fba27fe [arm load/store optimizer] When trying to merge a base update load/store, make ...

sure the base register and would-be writeback register don't conflict for
stores.  This was already being done for loads.

Unfortunately, it is rather difficult to create a test case for this issue.  It
was exposed in 450.soplex at LTO and requires unlucky register allocation.
<rdar://13394908>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177874 91177308-0d34-0410-b5e6-96231b3b80d8

2013-03-25 16:29:20 +00:00

..

Analysis

Support in AAEvaluator to print alias queries of loads/stores with TBAA tags.

2013-03-22 22:34:41 +00:00

Archive

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AsmParser

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Bitcode

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CodeGen

Teach cmake about the new Erlang GC files.

2013-03-25 14:12:21 +00:00

DebugInfo

Fix missing std::. Not sure how this compiles for anyone else.

2013-03-21 00:57:21 +00:00

ExecutionEngine

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IR

Swap the DIFile in DILexicalBlockFile out for the raw name/directory pair

2013-03-22 20:18:46 +00:00

Linker

The Linker interface has some dead code after the cleanup in r172749

2013-03-19 15:26:24 +00:00

MC

Dead code.

2013-03-19 22:13:05 +00:00

Object

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Option

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Support

Revert r177543: Add timing of the IR parsing code with a new

2013-03-22 02:20:34 +00:00

TableGen

Allow TableGen DAG arguments to be just a name.

2013-03-24 19:36:51 +00:00

Target

[arm load/store optimizer] When trying to merge a base update load/store, make

2013-03-25 16:29:20 +00:00

Transforms

Address issues found by Duncan during post-commit review of r177856.

2013-03-25 11:47:38 +00:00

CMakeLists.txt

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LLVMBuild.txt

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Makefile

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