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https://github.com/c64scene-ar/llvm-6502.git
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707fd44038
* rounding modes for fp add, mul, sub now use .rn * float -> int rounding correctly uses .rzi not .rni * 32bit fdiv for sm13 uses div.rn (instead of div.approx) * 32bit fdiv for sm10 now uses div (instead of div.approx) Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit. All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend. Patch by Dan Bailey git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133253 91177308-0d34-0410-b5e6-96231b3b80d8
40 lines
813 B
LLVM
40 lines
813 B
LLVM
; RUN: llc < %s -march=ptx32 | FileCheck %s
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;define ptx_device i32 @t1(i32 %x, i32 %y) {
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; %z = mul i32 %x, %y
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; ret i32 %z
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;}
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;define ptx_device i32 @t2(i32 %x) {
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; %z = mul i32 %x, 1
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; ret i32 %z
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;}
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define ptx_device float @t1_f32(float %x, float %y) {
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; CHECK: mul.rn.f32 r0, r1, r2
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; CHECK-NEXT: ret;
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%z = fmul float %x, %y
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ret float %z
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}
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define ptx_device double @t1_f64(double %x, double %y) {
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; CHECK: mul.rn.f64 rd0, rd1, rd2
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; CHECK-NEXT: ret;
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%z = fmul double %x, %y
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ret double %z
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}
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define ptx_device float @t2_f32(float %x) {
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; CHECK: mul.rn.f32 r0, r1, 0F40A00000;
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; CHECK-NEXT: ret;
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%z = fmul float %x, 5.0
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ret float %z
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}
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define ptx_device double @t2_f64(double %x) {
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; CHECK: mul.rn.f64 rd0, rd1, 0D4014000000000000;
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; CHECK-NEXT: ret;
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%z = fmul double %x, 5.0
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ret double %z
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}
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