mirror of
https://github.com/c64scene-ar/llvm-6502.git
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eea666f216
This approach also works when the terminator doesn't have a slot index. (Which can happen??) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123413 91177308-0d34-0410-b5e6-96231b3b80d8
703 lines
23 KiB
C++
703 lines
23 KiB
C++
//===- LiveDebugVariables.cpp - Tracking debug info variables -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LiveDebugVariables analysis.
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//
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// Remove all DBG_VALUE instructions referencing virtual registers and replace
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// them with a data structure tracking where live user variables are kept - in a
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// virtual register or in a stack slot.
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//
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// Allow the data structure to be updated during register allocation when values
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// are moved between registers and stack slots. Finally emit new DBG_VALUE
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// instructions after register allocation is complete.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "livedebug"
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#include "LiveDebugVariables.h"
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#include "VirtRegMap.h"
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#include "llvm/Constants.h"
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#include "llvm/Metadata.h"
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#include "llvm/Value.h"
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#include "llvm/ADT/IntervalMap.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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using namespace llvm;
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static cl::opt<bool>
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EnableLDV("live-debug-variables", cl::init(true),
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cl::desc("Enable the live debug variables pass"), cl::Hidden);
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char LiveDebugVariables::ID = 0;
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INITIALIZE_PASS_BEGIN(LiveDebugVariables, "livedebugvars",
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"Debug Variable Analysis", false, false)
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INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
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INITIALIZE_PASS_DEPENDENCY(LiveIntervals)
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INITIALIZE_PASS_END(LiveDebugVariables, "livedebugvars",
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"Debug Variable Analysis", false, false)
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void LiveDebugVariables::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<MachineDominatorTree>();
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AU.addRequiredTransitive<LiveIntervals>();
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AU.setPreservesAll();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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LiveDebugVariables::LiveDebugVariables() : MachineFunctionPass(ID), pImpl(0) {
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initializeLiveDebugVariablesPass(*PassRegistry::getPassRegistry());
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}
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/// LocMap - Map of where a user value is live, and its location.
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typedef IntervalMap<SlotIndex, unsigned, 4> LocMap;
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/// UserValue - A user value is a part of a debug info user variable.
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///
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/// A DBG_VALUE instruction notes that (a sub-register of) a virtual register
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/// holds part of a user variable. The part is identified by a byte offset.
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///
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/// UserValues are grouped into equivalence classes for easier searching. Two
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/// user values are related if they refer to the same variable, or if they are
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/// held by the same virtual register. The equivalence class is the transitive
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/// closure of that relation.
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namespace {
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class UserValue {
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const MDNode *variable; ///< The debug info variable we are part of.
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unsigned offset; ///< Byte offset into variable.
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UserValue *leader; ///< Equivalence class leader.
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UserValue *next; ///< Next value in equivalence class, or null.
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/// Numbered locations referenced by locmap.
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SmallVector<MachineOperand, 4> locations;
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/// Map of slot indices where this value is live.
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LocMap locInts;
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/// coalesceLocation - After LocNo was changed, check if it has become
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/// identical to another location, and coalesce them. This may cause LocNo or
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/// a later location to be erased, but no earlier location will be erased.
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void coalesceLocation(unsigned LocNo);
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/// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
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void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo,
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LiveIntervals &LIS, const TargetInstrInfo &TII);
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/// insertDebugKill - Insert an undef DBG_VALUE into MBB at Idx.
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void insertDebugKill(MachineBasicBlock *MBB, SlotIndex Idx,
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LiveIntervals &LIS, const TargetInstrInfo &TII);
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public:
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/// UserValue - Create a new UserValue.
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UserValue(const MDNode *var, unsigned o, LocMap::Allocator &alloc)
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: variable(var), offset(o), leader(this), next(0), locInts(alloc)
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{}
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/// getLeader - Get the leader of this value's equivalence class.
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UserValue *getLeader() {
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UserValue *l = leader;
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while (l != l->leader)
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l = l->leader;
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return leader = l;
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}
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/// getNext - Return the next UserValue in the equivalence class.
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UserValue *getNext() const { return next; }
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/// match - Does this UserValue match the aprameters?
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bool match(const MDNode *Var, unsigned Offset) const {
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return Var == variable && Offset == offset;
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}
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/// merge - Merge equivalence classes.
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static UserValue *merge(UserValue *L1, UserValue *L2) {
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L2 = L2->getLeader();
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if (!L1)
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return L2;
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L1 = L1->getLeader();
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if (L1 == L2)
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return L1;
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// Splice L2 before L1's members.
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UserValue *End = L2;
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while (End->next)
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End->leader = L1, End = End->next;
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End->leader = L1;
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End->next = L1->next;
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L1->next = L2;
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return L1;
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}
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/// getLocationNo - Return the location number that matches Loc.
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unsigned getLocationNo(const MachineOperand &LocMO) {
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if (LocMO.isReg() && LocMO.getReg() == 0)
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return ~0u;
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for (unsigned i = 0, e = locations.size(); i != e; ++i)
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if (LocMO.isIdenticalTo(locations[i]))
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return i;
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locations.push_back(LocMO);
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// We are storing a MachineOperand outside a MachineInstr.
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locations.back().clearParent();
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return locations.size() - 1;
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}
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/// addDef - Add a definition point to this value.
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void addDef(SlotIndex Idx, const MachineOperand &LocMO) {
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// Add a singular (Idx,Idx) -> Loc mapping.
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LocMap::iterator I = locInts.find(Idx);
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if (!I.valid() || I.start() != Idx)
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I.insert(Idx, Idx.getNextSlot(), getLocationNo(LocMO));
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}
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/// extendDef - Extend the current definition as far as possible down the
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/// dominator tree. Stop when meeting an existing def or when leaving the live
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/// range of VNI.
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/// @param Idx Starting point for the definition.
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/// @param LocNo Location number to propagate.
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/// @param LI Restrict liveness to where LI has the value VNI. May be null.
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/// @param VNI When LI is not null, this is the value to restrict to.
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/// @param LIS Live intervals analysis.
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/// @param MDT Dominator tree.
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void extendDef(SlotIndex Idx, unsigned LocNo,
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LiveInterval *LI, const VNInfo *VNI,
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LiveIntervals &LIS, MachineDominatorTree &MDT);
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/// computeIntervals - Compute the live intervals of all locations after
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/// collecting all their def points.
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void computeIntervals(LiveIntervals &LIS, MachineDominatorTree &MDT);
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/// renameRegister - Update locations to rewrite OldReg as NewReg:SubIdx.
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void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx,
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const TargetRegisterInfo *TRI);
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/// rewriteLocations - Rewrite virtual register locations according to the
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/// provided virtual register map.
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void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI);
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/// emitDebugVariables - Recreate DBG_VALUE instruction from data structures.
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void emitDebugValues(VirtRegMap *VRM,
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LiveIntervals &LIS, const TargetInstrInfo &TRI);
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void print(raw_ostream&, const TargetRegisterInfo*);
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};
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} // namespace
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/// LDVImpl - Implementation of the LiveDebugVariables pass.
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namespace {
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class LDVImpl {
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LiveDebugVariables &pass;
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LocMap::Allocator allocator;
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MachineFunction *MF;
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LiveIntervals *LIS;
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MachineDominatorTree *MDT;
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const TargetRegisterInfo *TRI;
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/// userValues - All allocated UserValue instances.
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SmallVector<UserValue*, 8> userValues;
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/// Map virtual register to eq class leader.
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typedef DenseMap<unsigned, UserValue*> VRMap;
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VRMap virtRegToEqClass;
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/// Map user variable to eq class leader.
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typedef DenseMap<const MDNode *, UserValue*> UVMap;
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UVMap userVarMap;
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/// getUserValue - Find or create a UserValue.
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UserValue *getUserValue(const MDNode *Var, unsigned Offset);
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/// lookupVirtReg - Find the EC leader for VirtReg or null.
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UserValue *lookupVirtReg(unsigned VirtReg);
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/// mapVirtReg - Map virtual register to an equivalence class.
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void mapVirtReg(unsigned VirtReg, UserValue *EC);
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/// handleDebugValue - Add DBG_VALUE instruction to our maps.
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/// @param MI DBG_VALUE instruction
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/// @param Idx Last valid SLotIndex before instruction.
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/// @return True if the DBG_VALUE instruction should be deleted.
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bool handleDebugValue(MachineInstr *MI, SlotIndex Idx);
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/// collectDebugValues - Collect and erase all DBG_VALUE instructions, adding
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/// a UserValue def for each instruction.
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/// @param mf MachineFunction to be scanned.
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/// @return True if any debug values were found.
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bool collectDebugValues(MachineFunction &mf);
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/// computeIntervals - Compute the live intervals of all user values after
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/// collecting all their def points.
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void computeIntervals();
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public:
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LDVImpl(LiveDebugVariables *ps) : pass(*ps) {}
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bool runOnMachineFunction(MachineFunction &mf);
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/// clear - Relase all memory.
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void clear() {
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DeleteContainerPointers(userValues);
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userValues.clear();
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virtRegToEqClass.clear();
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userVarMap.clear();
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}
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/// renameRegister - Replace all references to OldReg wiht NewReg:SubIdx.
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void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx);
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/// emitDebugVariables - Recreate DBG_VALUE instruction from data structures.
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void emitDebugValues(VirtRegMap *VRM);
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void print(raw_ostream&);
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};
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} // namespace
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void UserValue::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
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if (const MDString *MDS = dyn_cast<MDString>(variable->getOperand(2)))
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OS << "!\"" << MDS->getString() << "\"\t";
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if (offset)
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OS << '+' << offset;
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for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I) {
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OS << " [" << I.start() << ';' << I.stop() << "):";
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if (I.value() == ~0u)
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OS << "undef";
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else
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OS << I.value();
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}
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for (unsigned i = 0, e = locations.size(); i != e; ++i)
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OS << " Loc" << i << '=' << locations[i];
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OS << '\n';
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}
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void LDVImpl::print(raw_ostream &OS) {
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OS << "********** DEBUG VARIABLES **********\n";
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for (unsigned i = 0, e = userValues.size(); i != e; ++i)
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userValues[i]->print(OS, TRI);
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}
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void UserValue::coalesceLocation(unsigned LocNo) {
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unsigned KeepLoc = 0;
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for (unsigned e = locations.size(); KeepLoc != e; ++KeepLoc) {
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if (KeepLoc == LocNo)
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continue;
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if (locations[KeepLoc].isIdenticalTo(locations[LocNo]))
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break;
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}
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// No matches.
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if (KeepLoc == locations.size())
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return;
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// Keep the smaller location, erase the larger one.
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unsigned EraseLoc = LocNo;
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if (KeepLoc > EraseLoc)
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std::swap(KeepLoc, EraseLoc);
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locations.erase(locations.begin() + EraseLoc);
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// Rewrite values.
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for (LocMap::iterator I = locInts.begin(); I.valid(); ++I) {
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unsigned v = I.value();
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if (v == EraseLoc)
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I.setValue(KeepLoc); // Coalesce when possible.
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else if (v > EraseLoc)
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I.setValueUnchecked(v-1); // Avoid coalescing with untransformed values.
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}
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}
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UserValue *LDVImpl::getUserValue(const MDNode *Var, unsigned Offset) {
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UserValue *&Leader = userVarMap[Var];
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if (Leader) {
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UserValue *UV = Leader->getLeader();
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Leader = UV;
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for (; UV; UV = UV->getNext())
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if (UV->match(Var, Offset))
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return UV;
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}
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UserValue *UV = new UserValue(Var, Offset, allocator);
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userValues.push_back(UV);
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Leader = UserValue::merge(Leader, UV);
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return UV;
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}
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void LDVImpl::mapVirtReg(unsigned VirtReg, UserValue *EC) {
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assert(TargetRegisterInfo::isVirtualRegister(VirtReg) && "Only map VirtRegs");
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UserValue *&Leader = virtRegToEqClass[VirtReg];
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Leader = UserValue::merge(Leader, EC);
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}
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UserValue *LDVImpl::lookupVirtReg(unsigned VirtReg) {
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if (UserValue *UV = virtRegToEqClass.lookup(VirtReg))
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return UV->getLeader();
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return 0;
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}
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bool LDVImpl::handleDebugValue(MachineInstr *MI, SlotIndex Idx) {
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// DBG_VALUE loc, offset, variable
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if (MI->getNumOperands() != 3 ||
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!MI->getOperand(1).isImm() || !MI->getOperand(2).isMetadata()) {
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DEBUG(dbgs() << "Can't handle " << *MI);
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return false;
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}
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// Get or create the UserValue for (variable,offset).
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unsigned Offset = MI->getOperand(1).getImm();
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const MDNode *Var = MI->getOperand(2).getMetadata();
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UserValue *UV = getUserValue(Var, Offset);
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// If the location is a virtual register, make sure it is mapped.
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if (MI->getOperand(0).isReg()) {
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unsigned Reg = MI->getOperand(0).getReg();
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if (TargetRegisterInfo::isVirtualRegister(Reg))
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mapVirtReg(Reg, UV);
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}
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UV->addDef(Idx, MI->getOperand(0));
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return true;
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}
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bool LDVImpl::collectDebugValues(MachineFunction &mf) {
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bool Changed = false;
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for (MachineFunction::iterator MFI = mf.begin(), MFE = mf.end(); MFI != MFE;
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++MFI) {
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MachineBasicBlock *MBB = MFI;
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for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
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MBBI != MBBE;) {
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if (!MBBI->isDebugValue()) {
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++MBBI;
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continue;
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}
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// DBG_VALUE has no slot index, use the previous instruction instead.
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SlotIndex Idx = MBBI == MBB->begin() ?
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LIS->getMBBStartIdx(MBB) :
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LIS->getInstructionIndex(llvm::prior(MBBI)).getDefIndex();
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// Handle consecutive DBG_VALUE instructions with the same slot index.
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do {
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if (handleDebugValue(MBBI, Idx)) {
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MBBI = MBB->erase(MBBI);
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Changed = true;
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} else
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++MBBI;
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} while (MBBI != MBBE && MBBI->isDebugValue());
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}
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}
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return Changed;
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}
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void UserValue::extendDef(SlotIndex Idx, unsigned LocNo,
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LiveInterval *LI, const VNInfo *VNI,
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LiveIntervals &LIS, MachineDominatorTree &MDT) {
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SmallVector<SlotIndex, 16> Todo;
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Todo.push_back(Idx);
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do {
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SlotIndex Start = Todo.pop_back_val();
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MachineBasicBlock *MBB = LIS.getMBBFromIndex(Start);
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SlotIndex Stop = LIS.getMBBEndIdx(MBB);
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LocMap::iterator I = locInts.find(Start);
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// Limit to VNI's live range.
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bool ToEnd = true;
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if (LI && VNI) {
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LiveRange *Range = LI->getLiveRangeContaining(Start);
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if (!Range || Range->valno != VNI)
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continue;
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if (Range->end < Stop)
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Stop = Range->end, ToEnd = false;
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}
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// There could already be a short def at Start.
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if (I.valid() && I.start() <= Start) {
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// Stop when meeting a different location or an already extended interval.
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Start = Start.getNextSlot();
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if (I.value() != LocNo || I.stop() != Start)
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continue;
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// This is a one-slot placeholder. Just skip it.
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++I;
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}
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// Limited by the next def.
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if (I.valid() && I.start() < Stop)
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Stop = I.start(), ToEnd = false;
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if (Start >= Stop)
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continue;
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I.insert(Start, Stop, LocNo);
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// If we extended to the MBB end, propagate down the dominator tree.
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if (!ToEnd)
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continue;
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const std::vector<MachineDomTreeNode*> &Children =
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MDT.getNode(MBB)->getChildren();
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for (unsigned i = 0, e = Children.size(); i != e; ++i)
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Todo.push_back(LIS.getMBBStartIdx(Children[i]->getBlock()));
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} while (!Todo.empty());
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}
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void
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UserValue::computeIntervals(LiveIntervals &LIS, MachineDominatorTree &MDT) {
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SmallVector<std::pair<SlotIndex, unsigned>, 16> Defs;
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// Collect all defs to be extended (Skipping undefs).
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for (LocMap::const_iterator I = locInts.begin(); I.valid(); ++I)
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if (I.value() != ~0u)
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Defs.push_back(std::make_pair(I.start(), I.value()));
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for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
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SlotIndex Idx = Defs[i].first;
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unsigned LocNo = Defs[i].second;
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const MachineOperand &Loc = locations[LocNo];
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// Register locations are constrained to where the register value is live.
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if (Loc.isReg() && LIS.hasInterval(Loc.getReg())) {
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LiveInterval *LI = &LIS.getInterval(Loc.getReg());
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const VNInfo *VNI = LI->getVNInfoAt(Idx);
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extendDef(Idx, LocNo, LI, VNI, LIS, MDT);
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} else
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extendDef(Idx, LocNo, 0, 0, LIS, MDT);
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}
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// Finally, erase all the undefs.
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for (LocMap::iterator I = locInts.begin(); I.valid();)
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if (I.value() == ~0u)
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I.erase();
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else
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++I;
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}
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void LDVImpl::computeIntervals() {
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for (unsigned i = 0, e = userValues.size(); i != e; ++i)
|
|
userValues[i]->computeIntervals(*LIS, *MDT);
|
|
}
|
|
|
|
bool LDVImpl::runOnMachineFunction(MachineFunction &mf) {
|
|
MF = &mf;
|
|
LIS = &pass.getAnalysis<LiveIntervals>();
|
|
MDT = &pass.getAnalysis<MachineDominatorTree>();
|
|
TRI = mf.getTarget().getRegisterInfo();
|
|
clear();
|
|
DEBUG(dbgs() << "********** COMPUTING LIVE DEBUG VARIABLES: "
|
|
<< ((Value*)mf.getFunction())->getName()
|
|
<< " **********\n");
|
|
|
|
bool Changed = collectDebugValues(mf);
|
|
computeIntervals();
|
|
DEBUG(print(dbgs()));
|
|
return Changed;
|
|
}
|
|
|
|
bool LiveDebugVariables::runOnMachineFunction(MachineFunction &mf) {
|
|
if (!EnableLDV)
|
|
return false;
|
|
if (!pImpl)
|
|
pImpl = new LDVImpl(this);
|
|
return static_cast<LDVImpl*>(pImpl)->runOnMachineFunction(mf);
|
|
}
|
|
|
|
void LiveDebugVariables::releaseMemory() {
|
|
if (pImpl)
|
|
static_cast<LDVImpl*>(pImpl)->clear();
|
|
}
|
|
|
|
LiveDebugVariables::~LiveDebugVariables() {
|
|
if (pImpl)
|
|
delete static_cast<LDVImpl*>(pImpl);
|
|
}
|
|
|
|
void UserValue::
|
|
renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx,
|
|
const TargetRegisterInfo *TRI) {
|
|
for (unsigned i = locations.size(); i; --i) {
|
|
unsigned LocNo = i - 1;
|
|
MachineOperand &Loc = locations[LocNo];
|
|
if (!Loc.isReg() || Loc.getReg() != OldReg)
|
|
continue;
|
|
if (TargetRegisterInfo::isPhysicalRegister(NewReg))
|
|
Loc.substPhysReg(NewReg, *TRI);
|
|
else
|
|
Loc.substVirtReg(NewReg, SubIdx, *TRI);
|
|
coalesceLocation(LocNo);
|
|
}
|
|
}
|
|
|
|
void LDVImpl::
|
|
renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx) {
|
|
UserValue *UV = lookupVirtReg(OldReg);
|
|
if (!UV)
|
|
return;
|
|
|
|
if (TargetRegisterInfo::isVirtualRegister(NewReg))
|
|
mapVirtReg(NewReg, UV);
|
|
virtRegToEqClass.erase(OldReg);
|
|
|
|
do {
|
|
UV->renameRegister(OldReg, NewReg, SubIdx, TRI);
|
|
UV = UV->getNext();
|
|
} while (UV);
|
|
}
|
|
|
|
void LiveDebugVariables::
|
|
renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx) {
|
|
if (pImpl)
|
|
static_cast<LDVImpl*>(pImpl)->renameRegister(OldReg, NewReg, SubIdx);
|
|
}
|
|
|
|
void
|
|
UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) {
|
|
// Iterate over locations in reverse makes it easier to handle coalescing.
|
|
for (unsigned i = locations.size(); i ; --i) {
|
|
unsigned LocNo = i-1;
|
|
MachineOperand &Loc = locations[LocNo];
|
|
// Only virtual registers are rewritten.
|
|
if (!Loc.isReg() || !Loc.getReg() ||
|
|
!TargetRegisterInfo::isVirtualRegister(Loc.getReg()))
|
|
continue;
|
|
unsigned VirtReg = Loc.getReg();
|
|
if (VRM.isAssignedReg(VirtReg) &&
|
|
TargetRegisterInfo::isPhysicalRegister(VRM.getPhys(VirtReg))) {
|
|
Loc.substPhysReg(VRM.getPhys(VirtReg), TRI);
|
|
} else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT &&
|
|
VRM.isSpillSlotUsed(VRM.getStackSlot(VirtReg))) {
|
|
// FIXME: Translate SubIdx to a stackslot offset.
|
|
Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg));
|
|
} else {
|
|
Loc.setReg(0);
|
|
Loc.setSubReg(0);
|
|
}
|
|
coalesceLocation(LocNo);
|
|
}
|
|
DEBUG(print(dbgs(), &TRI));
|
|
}
|
|
|
|
/// findInsertLocation - Find an iterator and DebugLoc for inserting a DBG_VALUE
|
|
/// instruction.
|
|
static MachineBasicBlock::iterator
|
|
findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx, DebugLoc &DL,
|
|
LiveIntervals &LIS) {
|
|
SlotIndex Start = LIS.getMBBStartIdx(MBB);
|
|
Idx = Idx.getBaseIndex();
|
|
|
|
// Try to find an insert location by going backwards from Idx.
|
|
MachineInstr *MI;
|
|
while (!(MI = LIS.getInstructionFromIndex(Idx))) {
|
|
// We've reached the beginning of MBB.
|
|
if (Idx == Start) {
|
|
MachineBasicBlock::iterator I = MBB->SkipPHIsAndLabels(MBB->begin());
|
|
if (I != MBB->end())
|
|
DL = I->getDebugLoc();
|
|
return I;
|
|
}
|
|
Idx = Idx.getPrevIndex();
|
|
}
|
|
// We found an instruction. The insert point is after the instr.
|
|
DL = MI->getDebugLoc();
|
|
// Don't insert anything after the first terminator, though.
|
|
return MI->getDesc().isTerminator() ? MBB->getFirstTerminator() :
|
|
llvm::next(MachineBasicBlock::iterator(MI));
|
|
}
|
|
|
|
void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
|
|
unsigned LocNo,
|
|
LiveIntervals &LIS,
|
|
const TargetInstrInfo &TII) {
|
|
DebugLoc DL;
|
|
MachineBasicBlock::iterator I = findInsertLocation(MBB, Idx, DL, LIS);
|
|
MachineOperand &Loc = locations[LocNo];
|
|
|
|
// Frame index locations may require a target callback.
|
|
if (Loc.isFI()) {
|
|
MachineInstr *MI = TII.emitFrameIndexDebugValue(*MBB->getParent(),
|
|
Loc.getIndex(), offset, variable, DL);
|
|
if (MI) {
|
|
MBB->insert(I, MI);
|
|
return;
|
|
}
|
|
}
|
|
// This is not a frame index, or the target is happy with a standard FI.
|
|
BuildMI(*MBB, I, DL, TII.get(TargetOpcode::DBG_VALUE))
|
|
.addOperand(Loc).addImm(offset).addMetadata(variable);
|
|
}
|
|
|
|
void UserValue::insertDebugKill(MachineBasicBlock *MBB, SlotIndex Idx,
|
|
LiveIntervals &LIS, const TargetInstrInfo &TII) {
|
|
DebugLoc DL;
|
|
MachineBasicBlock::iterator I = findInsertLocation(MBB, Idx, DL, LIS);
|
|
BuildMI(*MBB, I, DL, TII.get(TargetOpcode::DBG_VALUE)).addReg(0)
|
|
.addImm(offset).addMetadata(variable);
|
|
}
|
|
|
|
void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
|
|
const TargetInstrInfo &TII) {
|
|
MachineFunction::iterator MFEnd = VRM->getMachineFunction().end();
|
|
|
|
for (LocMap::const_iterator I = locInts.begin(); I.valid();) {
|
|
SlotIndex Start = I.start();
|
|
SlotIndex Stop = I.stop();
|
|
unsigned LocNo = I.value();
|
|
DEBUG(dbgs() << "\t[" << Start << ';' << Stop << "):" << LocNo);
|
|
MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start);
|
|
SlotIndex MBBEnd = LIS.getMBBEndIdx(MBB);
|
|
|
|
DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
|
|
insertDebugValue(MBB, Start, LocNo, LIS, TII);
|
|
|
|
// This interval may span multiple basic blocks.
|
|
// Insert a DBG_VALUE into each one.
|
|
while(Stop > MBBEnd) {
|
|
// Move to the next block.
|
|
Start = MBBEnd;
|
|
if (++MBB == MFEnd)
|
|
break;
|
|
MBBEnd = LIS.getMBBEndIdx(MBB);
|
|
DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
|
|
insertDebugValue(MBB, Start, LocNo, LIS, TII);
|
|
}
|
|
DEBUG(dbgs() << '\n');
|
|
if (MBB == MFEnd)
|
|
break;
|
|
|
|
++I;
|
|
if (Stop == MBBEnd)
|
|
continue;
|
|
// The current interval ends before MBB.
|
|
// Insert a kill if there is a gap.
|
|
if (!I.valid() || I.start() > Stop)
|
|
insertDebugKill(MBB, Stop, LIS, TII);
|
|
}
|
|
}
|
|
|
|
void LDVImpl::emitDebugValues(VirtRegMap *VRM) {
|
|
DEBUG(dbgs() << "********** EMITTING LIVE DEBUG VARIABLES **********\n");
|
|
const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
|
|
for (unsigned i = 0, e = userValues.size(); i != e; ++i) {
|
|
userValues[i]->rewriteLocations(*VRM, *TRI);
|
|
userValues[i]->emitDebugValues(VRM, *LIS, *TII);
|
|
}
|
|
}
|
|
|
|
void LiveDebugVariables::emitDebugValues(VirtRegMap *VRM) {
|
|
if (pImpl)
|
|
static_cast<LDVImpl*>(pImpl)->emitDebugValues(VRM);
|
|
}
|
|
|
|
|
|
#ifndef NDEBUG
|
|
void LiveDebugVariables::dump() {
|
|
if (pImpl)
|
|
static_cast<LDVImpl*>(pImpl)->print(dbgs());
|
|
}
|
|
#endif
|
|
|