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flags. They are still not enable in this revision. Added TargetInstrInfo::isZeroCost() to fix a fundamental problem with the scheduler's model of operand latency in the selection DAG. Generalized unit tests to work with sched-cycles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123969 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
743 B
LLVM
34 lines
743 B
LLVM
; RUN: llc < %s -march=arm -mattr=+vfp3 | FileCheck %s
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define float @t1(float %x) nounwind readnone optsize {
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entry:
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; CHECK: t1:
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; CHECK: vmov.f32 s{{.*}}, #4.000000e+00
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%0 = fadd float %x, 4.000000e+00
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ret float %0
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}
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define double @t2(double %x) nounwind readnone optsize {
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entry:
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; CHECK: t2:
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; CHECK: vmov.f64 d{{.*}}, #3.000000e+00
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%0 = fadd double %x, 3.000000e+00
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ret double %0
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}
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define double @t3(double %x) nounwind readnone optsize {
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entry:
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; CHECK: t3:
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; CHECK: vmov.f64 d{{.*}}, #-1.300000e+01
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%0 = fmul double %x, -1.300000e+01
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ret double %0
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}
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define float @t4(float %x) nounwind readnone optsize {
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entry:
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; CHECK: t4:
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; CHECK: vmov.f32 s{{.*}}, #-2.400000e+01
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%0 = fmul float %x, -2.400000e+01
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ret float %0
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}
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