mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-25 00:29:20 +00:00
This adds assembler parser support to the PowerPC back end. The parser will run for any powerpc-*-* and powerpc64-*-* triples, but was tested only on 64-bit Linux. The supported syntax is intended to be compatible with the GNU assembler. The parser does not yet support all PowerPC instructions, but it does support anything that is generated by LLVM itself. There is no support for testing restricted instruction sets yet, i.e. the parser will always accept any instructions it knows, no matter what feature flags are given. Instruction operands will be checked for validity and errors generated. (Error handling in general could still be improved.) The patch adds a number of test cases to verify instruction and operand encodings. The tests currently cover all instructions from the following PowerPC ISA v2.06 Book I facilities: Branch, Fixed-point, Floating-Point, and Vector. Note that a number of these instructions are not yet supported by the back end; they are marked with FIXME. A number of follow-on check-ins will add extra features. When they are all included, LLVM passes all tests (including bootstrap) when using clang -cc1as as the system assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181050 91177308-0d34-0410-b5e6-96231b3b80d8
385 lines
17 KiB
ArmAsm
385 lines
17 KiB
ArmAsm
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# RUN: llvm-mc -triple powerpc64-unknown-unknown --show-encoding %s | FileCheck %s
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# Vector facility
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# Vector storage access instructions
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# CHECK: lvebx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x0e]
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lvebx 2, 3, 4
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# CHECK: lvehx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x4e]
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lvehx 2, 3, 4
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# CHECK: lvewx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x8e]
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lvewx 2, 3, 4
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# CHECK: lvx 2, 3, 4 # encoding: [0x7c,0x43,0x20,0xce]
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lvx 2, 3, 4
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# CHECK: lvxl 2, 3, 4 # encoding: [0x7c,0x43,0x22,0xce]
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lvxl 2, 3, 4
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# CHECK: stvebx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x0e]
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stvebx 2, 3, 4
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# CHECK: stvehx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x4e]
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stvehx 2, 3, 4
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# CHECK: stvewx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x8e]
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stvewx 2, 3, 4
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# CHECK: stvx 2, 3, 4 # encoding: [0x7c,0x43,0x21,0xce]
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stvx 2, 3, 4
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# CHECK: stvxl 2, 3, 4 # encoding: [0x7c,0x43,0x23,0xce]
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stvxl 2, 3, 4
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# CHECK: lvsl 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x0c]
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lvsl 2, 3, 4
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# CHECK: lvsr 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x4c]
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lvsr 2, 3, 4
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# Vector permute and formatting instructions
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# CHECK: vpkpx 2, 3, 4 # encoding: [0x10,0x43,0x23,0x0e]
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vpkpx 2, 3, 4
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# CHECK: vpkshss 2, 3, 4 # encoding: [0x10,0x43,0x21,0x8e]
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vpkshss 2, 3, 4
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# CHECK: vpkshus 2, 3, 4 # encoding: [0x10,0x43,0x21,0x0e]
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vpkshus 2, 3, 4
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# CHECK: vpkswss 2, 3, 4 # encoding: [0x10,0x43,0x21,0xce]
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vpkswss 2, 3, 4
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# CHECK: vpkswus 2, 3, 4 # encoding: [0x10,0x43,0x21,0x4e]
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vpkswus 2, 3, 4
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# CHECK: vpkuhum 2, 3, 4 # encoding: [0x10,0x43,0x20,0x0e]
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vpkuhum 2, 3, 4
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# CHECK: vpkuhus 2, 3, 4 # encoding: [0x10,0x43,0x20,0x8e]
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vpkuhus 2, 3, 4
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# CHECK: vpkuwum 2, 3, 4 # encoding: [0x10,0x43,0x20,0x4e]
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vpkuwum 2, 3, 4
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# CHECK: vpkuwus 2, 3, 4 # encoding: [0x10,0x43,0x20,0xce]
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vpkuwus 2, 3, 4
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# CHECK: vupkhpx 2, 3 # encoding: [0x10,0x40,0x1b,0x4e]
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vupkhpx 2, 3
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# CHECK: vupkhsb 2, 3 # encoding: [0x10,0x40,0x1a,0x0e]
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vupkhsb 2, 3
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# CHECK: vupkhsh 2, 3 # encoding: [0x10,0x40,0x1a,0x4e]
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vupkhsh 2, 3
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# CHECK: vupklpx 2, 3 # encoding: [0x10,0x40,0x1b,0xce]
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vupklpx 2, 3
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# CHECK: vupklsb 2, 3 # encoding: [0x10,0x40,0x1a,0x8e]
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vupklsb 2, 3
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# CHECK: vupklsh 2, 3 # encoding: [0x10,0x40,0x1a,0xce]
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vupklsh 2, 3
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# CHECK: vmrghb 2, 3, 4 # encoding: [0x10,0x43,0x20,0x0c]
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vmrghb 2, 3, 4
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# CHECK: vmrghh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x4c]
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vmrghh 2, 3, 4
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# CHECK: vmrghw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x8c]
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vmrghw 2, 3, 4
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# CHECK: vmrglb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x0c]
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vmrglb 2, 3, 4
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# CHECK: vmrglh 2, 3, 4 # encoding: [0x10,0x43,0x21,0x4c]
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vmrglh 2, 3, 4
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# CHECK: vmrglw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x8c]
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vmrglw 2, 3, 4
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# CHECK: vspltb 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x0c]
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vspltb 2, 3, 1
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# CHECK: vsplth 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x4c]
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vsplth 2, 3, 1
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# CHECK: vspltw 2, 3, 1 # encoding: [0x10,0x41,0x1a,0x8c]
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vspltw 2, 3, 1
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# CHECK: vspltisb 2, 3 # encoding: [0x10,0x43,0x03,0x0c]
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vspltisb 2, 3
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# CHECK: vspltish 2, 3 # encoding: [0x10,0x43,0x03,0x4c]
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vspltish 2, 3
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# CHECK: vspltisw 2, 3 # encoding: [0x10,0x43,0x03,0x8c]
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vspltisw 2, 3
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# CHECK: vperm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x6b]
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vperm 2, 3, 4, 5
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# CHECK: vsel 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x6a]
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vsel 2, 3, 4, 5
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# CHECK: vsl 2, 3, 4 # encoding: [0x10,0x43,0x21,0xc4]
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vsl 2, 3, 4
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# CHECK: vsldoi 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x6c]
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vsldoi 2, 3, 4, 5
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# CHECK: vslo 2, 3, 4 # encoding: [0x10,0x43,0x24,0x0c]
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vslo 2, 3, 4
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# CHECK: vsr 2, 3, 4 # encoding: [0x10,0x43,0x22,0xc4]
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vsr 2, 3, 4
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# CHECK: vsro 2, 3, 4 # encoding: [0x10,0x43,0x24,0x4c]
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vsro 2, 3, 4
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# Vector integer arithmetic instructions
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# CHECK: vaddcuw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x80]
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vaddcuw 2, 3, 4
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# CHECK: vaddsbs 2, 3, 4 # encoding: [0x10,0x43,0x23,0x00]
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vaddsbs 2, 3, 4
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# CHECK: vaddshs 2, 3, 4 # encoding: [0x10,0x43,0x23,0x40]
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vaddshs 2, 3, 4
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# CHECK: vaddsws 2, 3, 4 # encoding: [0x10,0x43,0x23,0x80]
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vaddsws 2, 3, 4
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# CHECK: vaddubm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x00]
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vaddubm 2, 3, 4
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# CHECK: vadduhm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x40]
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vadduhm 2, 3, 4
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# CHECK: vadduwm 2, 3, 4 # encoding: [0x10,0x43,0x20,0x80]
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vadduwm 2, 3, 4
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# CHECK: vaddubs 2, 3, 4 # encoding: [0x10,0x43,0x22,0x00]
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vaddubs 2, 3, 4
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# CHECK: vadduhs 2, 3, 4 # encoding: [0x10,0x43,0x22,0x40]
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vadduhs 2, 3, 4
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# CHECK: vadduws 2, 3, 4 # encoding: [0x10,0x43,0x22,0x80]
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vadduws 2, 3, 4
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# CHECK: vsubcuw 2, 3, 4 # encoding: [0x10,0x43,0x25,0x80]
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vsubcuw 2, 3, 4
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# CHECK: vsubsbs 2, 3, 4 # encoding: [0x10,0x43,0x27,0x00]
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vsubsbs 2, 3, 4
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# CHECK: vsubshs 2, 3, 4 # encoding: [0x10,0x43,0x27,0x40]
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vsubshs 2, 3, 4
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# CHECK: vsubsws 2, 3, 4 # encoding: [0x10,0x43,0x27,0x80]
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vsubsws 2, 3, 4
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# CHECK: vsububm 2, 3, 4 # encoding: [0x10,0x43,0x24,0x00]
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vsububm 2, 3, 4
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# CHECK: vsubuhm 2, 3, 4 # encoding: [0x10,0x43,0x24,0x40]
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vsubuhm 2, 3, 4
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# CHECK: vsubuwm 2, 3, 4 # encoding: [0x10,0x43,0x24,0x80]
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vsubuwm 2, 3, 4
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# CHECK: vsububs 2, 3, 4 # encoding: [0x10,0x43,0x26,0x00]
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vsububs 2, 3, 4
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# CHECK: vsubuhs 2, 3, 4 # encoding: [0x10,0x43,0x26,0x40]
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vsubuhs 2, 3, 4
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# CHECK: vsubuws 2, 3, 4 # encoding: [0x10,0x43,0x26,0x80]
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vsubuws 2, 3, 4
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# CHECK: vmulesb 2, 3, 4 # encoding: [0x10,0x43,0x23,0x08]
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vmulesb 2, 3, 4
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# CHECK: vmulesh 2, 3, 4 # encoding: [0x10,0x43,0x23,0x48]
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vmulesh 2, 3, 4
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# CHECK: vmuleub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x08]
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vmuleub 2, 3, 4
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# CHECK: vmuleuh 2, 3, 4 # encoding: [0x10,0x43,0x22,0x48]
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vmuleuh 2, 3, 4
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# CHECK: vmulosb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x08]
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vmulosb 2, 3, 4
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# CHECK: vmulosh 2, 3, 4 # encoding: [0x10,0x43,0x21,0x48]
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vmulosh 2, 3, 4
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# CHECK: vmuloub 2, 3, 4 # encoding: [0x10,0x43,0x20,0x08]
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vmuloub 2, 3, 4
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# CHECK: vmulouh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x48]
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vmulouh 2, 3, 4
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# CHECK: vmhaddshs 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x60]
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vmhaddshs 2, 3, 4, 5
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# CHECK: vmhraddshs 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x61]
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vmhraddshs 2, 3, 4, 5
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# CHECK: vmladduhm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x62]
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vmladduhm 2, 3, 4, 5
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# CHECK: vmsumubm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x64]
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vmsumubm 2, 3, 4, 5
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# CHECK: vmsummbm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x65]
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vmsummbm 2, 3, 4, 5
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# CHECK: vmsumshm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x68]
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vmsumshm 2, 3, 4, 5
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# CHECK: vmsumshs 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x69]
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vmsumshs 2, 3, 4, 5
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# CHECK: vmsumuhm 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x66]
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vmsumuhm 2, 3, 4, 5
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# CHECK: vmsumuhs 2, 3, 4, 5 # encoding: [0x10,0x43,0x21,0x67]
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vmsumuhs 2, 3, 4, 5
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# CHECK: vsumsws 2, 3, 4 # encoding: [0x10,0x43,0x27,0x88]
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vsumsws 2, 3, 4
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# CHECK: vsum2sws 2, 3, 4 # encoding: [0x10,0x43,0x26,0x88]
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vsum2sws 2, 3, 4
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# CHECK: vsum4sbs 2, 3, 4 # encoding: [0x10,0x43,0x27,0x08]
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vsum4sbs 2, 3, 4
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# CHECK: vsum4shs 2, 3, 4 # encoding: [0x10,0x43,0x26,0x48]
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vsum4shs 2, 3, 4
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# CHECK: vsum4ubs 2, 3, 4 # encoding: [0x10,0x43,0x26,0x08]
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vsum4ubs 2, 3, 4
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# CHECK: vavgsb 2, 3, 4 # encoding: [0x10,0x43,0x25,0x02]
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vavgsb 2, 3, 4
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# CHECK: vavgsh 2, 3, 4 # encoding: [0x10,0x43,0x25,0x42]
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vavgsh 2, 3, 4
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# CHECK: vavgsw 2, 3, 4 # encoding: [0x10,0x43,0x25,0x82]
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vavgsw 2, 3, 4
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# CHECK: vavgub 2, 3, 4 # encoding: [0x10,0x43,0x24,0x02]
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vavgub 2, 3, 4
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# CHECK: vavguh 2, 3, 4 # encoding: [0x10,0x43,0x24,0x42]
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vavguh 2, 3, 4
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# CHECK: vavguw 2, 3, 4 # encoding: [0x10,0x43,0x24,0x82]
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vavguw 2, 3, 4
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# CHECK: vmaxsb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x02]
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vmaxsb 2, 3, 4
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# CHECK: vmaxsh 2, 3, 4 # encoding: [0x10,0x43,0x21,0x42]
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vmaxsh 2, 3, 4
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# CHECK: vmaxsw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x82]
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vmaxsw 2, 3, 4
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# CHECK: vmaxub 2, 3, 4 # encoding: [0x10,0x43,0x20,0x02]
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vmaxub 2, 3, 4
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# CHECK: vmaxuh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x42]
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vmaxuh 2, 3, 4
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# CHECK: vmaxuw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x82]
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vmaxuw 2, 3, 4
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# CHECK: vminsb 2, 3, 4 # encoding: [0x10,0x43,0x23,0x02]
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vminsb 2, 3, 4
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# CHECK: vminsh 2, 3, 4 # encoding: [0x10,0x43,0x23,0x42]
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vminsh 2, 3, 4
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# CHECK: vminsw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x82]
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vminsw 2, 3, 4
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# CHECK: vminub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x02]
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vminub 2, 3, 4
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# CHECK: vminuh 2, 3, 4 # encoding: [0x10,0x43,0x22,0x42]
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vminuh 2, 3, 4
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# CHECK: vminuw 2, 3, 4 # encoding: [0x10,0x43,0x22,0x82]
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vminuw 2, 3, 4
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# Vector integer compare instructions
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# CHECK: vcmpequb 2, 3, 4 # encoding: [0x10,0x43,0x20,0x06]
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vcmpequb 2, 3, 4
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# CHECK: vcmpequb. 2, 3, 4 # encoding: [0x10,0x43,0x24,0x06]
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vcmpequb. 2, 3, 4
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# CHECK: vcmpequh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x46]
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vcmpequh 2, 3, 4
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# CHECK: vcmpequh. 2, 3, 4 # encoding: [0x10,0x43,0x24,0x46]
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vcmpequh. 2, 3, 4
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# CHECK: vcmpequw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x86]
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vcmpequw 2, 3, 4
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# CHECK: vcmpequw. 2, 3, 4 # encoding: [0x10,0x43,0x24,0x86]
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vcmpequw. 2, 3, 4
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# CHECK: vcmpgtsb 2, 3, 4 # encoding: [0x10,0x43,0x23,0x06]
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vcmpgtsb 2, 3, 4
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# CHECK: vcmpgtsb. 2, 3, 4 # encoding: [0x10,0x43,0x27,0x06]
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vcmpgtsb. 2, 3, 4
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# CHECK: vcmpgtsh 2, 3, 4 # encoding: [0x10,0x43,0x23,0x46]
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vcmpgtsh 2, 3, 4
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# CHECK: vcmpgtsh. 2, 3, 4 # encoding: [0x10,0x43,0x27,0x46]
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vcmpgtsh. 2, 3, 4
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# CHECK: vcmpgtsw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x86]
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vcmpgtsw 2, 3, 4
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# CHECK: vcmpgtsw. 2, 3, 4 # encoding: [0x10,0x43,0x27,0x86]
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vcmpgtsw. 2, 3, 4
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# CHECK: vcmpgtub 2, 3, 4 # encoding: [0x10,0x43,0x22,0x06]
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vcmpgtub 2, 3, 4
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# CHECK: vcmpgtub. 2, 3, 4 # encoding: [0x10,0x43,0x26,0x06]
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vcmpgtub. 2, 3, 4
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# CHECK: vcmpgtuh 2, 3, 4 # encoding: [0x10,0x43,0x22,0x46]
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vcmpgtuh 2, 3, 4
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# CHECK: vcmpgtuh. 2, 3, 4 # encoding: [0x10,0x43,0x26,0x46]
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vcmpgtuh. 2, 3, 4
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# CHECK: vcmpgtuw 2, 3, 4 # encoding: [0x10,0x43,0x22,0x86]
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vcmpgtuw 2, 3, 4
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# CHECK: vcmpgtuw. 2, 3, 4 # encoding: [0x10,0x43,0x26,0x86]
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vcmpgtuw. 2, 3, 4
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# Vector integer logical instructions
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# CHECK: vand 2, 3, 4 # encoding: [0x10,0x43,0x24,0x04]
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vand 2, 3, 4
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# CHECK: vandc 2, 3, 4 # encoding: [0x10,0x43,0x24,0x44]
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vandc 2, 3, 4
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# CHECK: vnor 2, 3, 4 # encoding: [0x10,0x43,0x25,0x04]
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vnor 2, 3, 4
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# CHECK: vor 2, 3, 4 # encoding: [0x10,0x43,0x24,0x84]
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vor 2, 3, 4
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# CHECK: vxor 2, 3, 4 # encoding: [0x10,0x43,0x24,0xc4]
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vxor 2, 3, 4
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# Vector integer rotate and shift instructions
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# CHECK: vrlb 2, 3, 4 # encoding: [0x10,0x43,0x20,0x04]
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vrlb 2, 3, 4
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# CHECK: vrlh 2, 3, 4 # encoding: [0x10,0x43,0x20,0x44]
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vrlh 2, 3, 4
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# CHECK: vrlw 2, 3, 4 # encoding: [0x10,0x43,0x20,0x84]
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vrlw 2, 3, 4
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# CHECK: vslb 2, 3, 4 # encoding: [0x10,0x43,0x21,0x04]
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vslb 2, 3, 4
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# CHECK: vslh 2, 3, 4 # encoding: [0x10,0x43,0x21,0x44]
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vslh 2, 3, 4
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# CHECK: vslw 2, 3, 4 # encoding: [0x10,0x43,0x21,0x84]
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vslw 2, 3, 4
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# CHECK: vsrb 2, 3, 4 # encoding: [0x10,0x43,0x22,0x04]
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vsrb 2, 3, 4
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# CHECK: vsrh 2, 3, 4 # encoding: [0x10,0x43,0x22,0x44]
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vsrh 2, 3, 4
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# CHECK: vsrw 2, 3, 4 # encoding: [0x10,0x43,0x22,0x84]
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vsrw 2, 3, 4
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# CHECK: vsrab 2, 3, 4 # encoding: [0x10,0x43,0x23,0x04]
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vsrab 2, 3, 4
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# CHECK: vsrah 2, 3, 4 # encoding: [0x10,0x43,0x23,0x44]
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vsrah 2, 3, 4
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# CHECK: vsraw 2, 3, 4 # encoding: [0x10,0x43,0x23,0x84]
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vsraw 2, 3, 4
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# Vector floating-point instructions
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# CHECK: vaddfp 2, 3, 4 # encoding: [0x10,0x43,0x20,0x0a]
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vaddfp 2, 3, 4
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# CHECK: vsubfp 2, 3, 4 # encoding: [0x10,0x43,0x20,0x4a]
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vsubfp 2, 3, 4
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# CHECK: vmaddfp 2, 3, 4, 5 # encoding: [0x10,0x43,0x29,0x2e]
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vmaddfp 2, 3, 4, 5
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# CHECK: vnmsubfp 2, 3, 4, 5 # encoding: [0x10,0x43,0x29,0x2f]
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vnmsubfp 2, 3, 4, 5
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|
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# CHECK: vmaxfp 2, 3, 4 # encoding: [0x10,0x43,0x24,0x0a]
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|
vmaxfp 2, 3, 4
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# CHECK: vminfp 2, 3, 4 # encoding: [0x10,0x43,0x24,0x4a]
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|
vminfp 2, 3, 4
|
|
|
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# CHECK: vctsxs 2, 3, 4 # encoding: [0x10,0x44,0x1b,0xca]
|
|
vctsxs 2, 3, 4
|
|
# CHECK: vctuxs 2, 3, 4 # encoding: [0x10,0x44,0x1b,0x8a]
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|
vctuxs 2, 3, 4
|
|
# CHECK: vcfsx 2, 3, 4 # encoding: [0x10,0x44,0x1b,0x4a]
|
|
vcfsx 2, 3, 4
|
|
# CHECK: vcfux 2, 3, 4 # encoding: [0x10,0x44,0x1b,0x0a]
|
|
vcfux 2, 3, 4
|
|
# CHECK: vrfim 2, 3 # encoding: [0x10,0x40,0x1a,0xca]
|
|
vrfim 2, 3
|
|
# CHECK: vrfin 2, 3 # encoding: [0x10,0x40,0x1a,0x0a]
|
|
vrfin 2, 3
|
|
# CHECK: vrfip 2, 3 # encoding: [0x10,0x40,0x1a,0x8a]
|
|
vrfip 2, 3
|
|
# CHECK: vrfiz 2, 3 # encoding: [0x10,0x40,0x1a,0x4a]
|
|
vrfiz 2, 3
|
|
|
|
# CHECK: vcmpbfp 2, 3, 4 # encoding: [0x10,0x43,0x23,0xc6]
|
|
vcmpbfp 2, 3, 4
|
|
# CHECK: vcmpbfp. 2, 3, 4 # encoding: [0x10,0x43,0x27,0xc6]
|
|
vcmpbfp. 2, 3, 4
|
|
# CHECK: vcmpeqfp 2, 3, 4 # encoding: [0x10,0x43,0x20,0xc6]
|
|
vcmpeqfp 2, 3, 4
|
|
# CHECK: vcmpeqfp. 2, 3, 4 # encoding: [0x10,0x43,0x24,0xc6]
|
|
vcmpeqfp. 2, 3, 4
|
|
# CHECK: vcmpgefp 2, 3, 4 # encoding: [0x10,0x43,0x21,0xc6]
|
|
vcmpgefp 2, 3, 4
|
|
# CHECK: vcmpgefp. 2, 3, 4 # encoding: [0x10,0x43,0x25,0xc6]
|
|
vcmpgefp. 2, 3, 4
|
|
# CHECK: vcmpgtfp 2, 3, 4 # encoding: [0x10,0x43,0x22,0xc6]
|
|
vcmpgtfp 2, 3, 4
|
|
# CHECK: vcmpgtfp. 2, 3, 4 # encoding: [0x10,0x43,0x26,0xc6]
|
|
vcmpgtfp. 2, 3, 4
|
|
|
|
# CHECK: vexptefp 2, 3 # encoding: [0x10,0x40,0x19,0x8a]
|
|
vexptefp 2, 3
|
|
# CHECK: vlogefp 2, 3 # encoding: [0x10,0x40,0x19,0xca]
|
|
vlogefp 2, 3
|
|
# CHECK: vrefp 2, 3 # encoding: [0x10,0x40,0x19,0x0a]
|
|
vrefp 2, 3
|
|
# CHECK: vrsqrtefp 2, 3 # encoding: [0x10,0x40,0x19,0x4a]
|
|
vrsqrtefp 2, 3
|
|
|
|
# Vector status and control register instructions
|
|
|
|
# CHECK: mtvscr 2 # encoding: [0x10,0x00,0x16,0x44]
|
|
mtvscr 2
|
|
# CHECK: mfvscr 2 # encoding: [0x10,0x40,0x06,0x04]
|
|
mfvscr 2
|
|
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