Simon Pilgrim c8ff340f75 Refreshed tests and reordered in descending integer size. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242610 91177308-0d34-0410-b5e6-96231b3b80d8		2015-07-18 16:14:56 +00:00
..
AArch64	[RAGreedy] Add an experimental deferred spilling feature.	2015-07-17 23:04:06 +00:00
AMDGPU
ARM	ARM: Enable MachineScheduler and disable PostRAScheduler for swift.	2015-07-17 23:18:30 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips
MIR	MIR Parser: Allow the dollar characters in all of the identifier tokens.	2015-07-17 22:48:04 +00:00
MSP430
NVPTX
PowerPC
SPARC
SystemZ
Thumb
Thumb2	ARM: Add scheduling information for LDRLIT instructions to swift scheduling model	2015-07-17 23:18:26 +00:00
WebAssembly
WinEH
X86	Refreshed tests and reordered in descending integer size.	2015-07-18 16:14:56 +00:00
XCore