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0ff4287fe2
IR for CUDA should use "nvptx[64]-nvidia-cuda", and IR for NV OpenCL should use "nvptx[64]-nvidia-nvcl" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184579 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
606 B
LLVM
20 lines
606 B
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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target triple = "nvptx-nvidia-cuda"
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; Make sure predicate (i1) operands to kernels get expanded out to .u8
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; CHECK: .entry foo
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; CHECK: .param .u8 foo_param_0
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; CHECK: .param .u32 foo_param_1
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define void @foo(i1 %p, i32* %out) {
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%val = zext i1 %p to i32
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store i32 %val, i32* %out
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ret void
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}
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!nvvm.annotations = !{!0}
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!0 = metadata !{void (i1, i32*)* @foo, metadata !"kernel", i32 1}
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