llvm-6502/test/CodeGen
Hal Finkel ac81cc3282 Add support for generating reg+reg preinc stores on PPC.
PPC will now generate STWUX and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158698 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-19 02:34:32 +00:00
..
ARM ARM: use NOEN loads and stores if possible when handling struct byval. 2012-06-18 22:23:48 +00:00
CellSPU Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00
CPP
Generic Fix test case to work on ARM. 2012-06-11 16:01:14 +00:00
Hexagon Enable all Hexagon tests. 2012-05-15 16:13:12 +00:00
MBlaze
Mips 1. introduce MipsPat in place of Pat in order to exclude those from 2012-06-14 21:03:23 +00:00
MSP430 These tests used intrinsics with the wrong prototype. They weren't caught because 2012-05-27 19:35:41 +00:00
NVPTX Add llvm.fabs intrinsic. 2012-05-28 21:48:37 +00:00
PowerPC Add support for generating reg+reg preinc stores on PPC. 2012-06-19 02:34:32 +00:00
SPARC Regression test for PR2960. 2012-05-01 11:11:34 +00:00
Thumb Make test less fragile. 2012-04-27 20:48:18 +00:00
Thumb2 Add a test case for global live range splitting. 2012-05-23 23:42:23 +00:00
X86 really add a triple :-( 2012-06-19 02:17:35 +00:00
XCore Fix pattern for MKMSK instruction. 2012-06-13 17:59:12 +00:00