llvm-6502/test/CodeGen/AArch64/arm64-tls-darwin.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

19 lines
566 B
LLVM

; RUN: llc -mtriple=arm64-apple-ios7.0 %s -o - | FileCheck %s
@var = thread_local global i8 0
; N.b. x0 must be the result of the first load (i.e. the address of the
; descriptor) when tlv_get_addr is called. Likewise the result is returned in
; x0.
define i8 @get_var() {
; CHECK-LABEL: get_var:
; CHECK: adrp x[[TLVPDESC_SLOT_HI:[0-9]+]], _var@TLVPPAGE
; CHECK: ldr x0, [x[[TLVPDESC_SLOT_HI]], _var@TLVPPAGEOFF]
; CHECK: ldr [[TLV_GET_ADDR:x[0-9]+]], [x0]
; CHECK: blr [[TLV_GET_ADDR]]
; CHECK: ldrb w0, [x0]
%val = load i8, i8* @var, align 1
ret i8 %val
}