llvm-6502/test/CodeGen
Arnaud A. de Grandmaison c9ada07cca [AArch64] Cleanup A57PBQPConstraints
And add a long awaited testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220381 91177308-0d34-0410-b5e6-96231b3b80d8
2014-10-22 12:40:20 +00:00
..
AArch64 [AArch64] Cleanup A57PBQPConstraints 2014-10-22 12:40:20 +00:00
ARM ARM: rework Thumb1 frame index rewriting 2014-10-20 21:28:41 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX
PowerPC Add minnum / maxnum codegen 2014-10-21 23:01:01 +00:00
R600 R600/SI: Add another failing testcase for i1 copies 2014-10-22 05:30:42 +00:00
SPARC
SystemZ
Thumb [Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex 2014-10-20 11:00:18 +00:00
Thumb2
X86 Add minnum / maxnum codegen 2014-10-21 23:01:01 +00:00
XCore Fix a bit of confusion about .set and produce more readable assembly. 2014-10-21 01:17:30 +00:00