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The subtarget information is the ultimate source of truth for the feature set that is enabled at this point. We would previously not propagate the feature information to the subtarget. While this worked for the most part (features would be enabled/disabled as requested), if another operation that changed the feature bits was encountered (such as a mode switch via a .arm or .thumb directive), we would end up resetting the behaviour of the architectural extensions. Handling this properly requires a slightly more complicated handling. We need to check if the feature is now being toggled. If so, only then do we toggle the features. In return, we no longer have to calculate the feature bits ourselves. The test changes are mostly to the diagnosis, which is now more uniform (a nice side effect!). Add an additional test to ensure that we handle this case properly. Thanks to Nico Weber for alerting me to this issue! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214057 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.8 KiB
ArmAsm
58 lines
1.8 KiB
ArmAsm
@ RUN: not llvm-mc -triple armv7-eabi -filetype asm -o /dev/null 2>&1 %s \
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@ RUN: | FileCheck %s -check-prefix CHECK-V7
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@ RUN: not llvm-mc -triple armv8-eabi -filetype asm -o /dev/null 2>&1 %s \
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@ RUN: | FileCheck %s -check-prefix CHECK-V8
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.syntax unified
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.arm
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.arch_extension crc
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@ CHECK-V7: error: architectural extension 'crc' is not allowed for the current base architecture
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@ CHECK-V7-NEXT: .arch_extension crc
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@ CHECK-V7-NEXT: ^
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.type crc,%function
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crc:
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crc32b r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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crc32h r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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crc32w r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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crc32cb r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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crc32ch r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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crc32cw r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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.arch_extension nocrc
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@ CHECK-V7: error: architectural extension 'crc' is not allowed for the current base architecture
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@ CHECK-V7-NEXT: .arch_extension nocrc
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@ CHECK-V7-NEXT: ^
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.type nocrc,%function
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nocrc:
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crc32b r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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@ CHECK-V8: error: instruction requires: crc
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crc32h r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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@ CHECK-V8: error: instruction requires: crc
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crc32w r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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@ CHECK-V8: error: instruction requires: crc
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crc32cb r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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@ CHECK-V8: error: instruction requires: crc
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crc32ch r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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@ CHECK-V8: error: instruction requires: crc
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crc32cw r0, r1, r2
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@ CHECK-V7: error: instruction requires: crc armv8
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@ CHECK-V8: error: instruction requires: crc
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