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https://github.com/c64scene-ar/llvm-6502.git
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0b19b561e0
PPCTargetLowering::DAGCombineExtBoolTrunc contains logic to remove unwanted truncations and extensions when dealing with nodes of the form: zext(binary-ops(binary-ops(trunc(x), trunc(y)), ...) There was a FIXME in the implementation (now removed) regarding the fact that the function would abort the transformations if any of the non-output operands of a SELECT or SELECT_CC node would need to be promoted (because they were also output operands, for example). As a result, we continued to generate unnecessary zero-extends for code such as this: unsigned foo(unsigned a, unsigned b) { return (a <= b) ? a : b; } which would produce: cmplw 0, 3, 4 isel 3, 4, 3, 1 rldicl 3, 3, 0, 32 blr and now we produce: cmplw 0, 3, 4 isel 3, 4, 3, 1 blr which is better in the obvious way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224213 91177308-0d34-0410-b5e6-96231b3b80d8
44 lines
920 B
LLVM
44 lines
920 B
LLVM
; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define signext i32 @foo(i32 signext %a) #0 {
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entry:
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%mul = mul nsw i32 %a, %a
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%shr2 = lshr i32 %mul, 5
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ret i32 %shr2
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; CHECK-LABEL @foo
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; CHECK-NOT: rldicl 3, {{[0-9]+}}, 0, 32
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; CHECK: blr
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}
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define zeroext i32 @test6(i32 zeroext %x) #0 {
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entry:
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%and = lshr i32 %x, 16
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%shr = and i32 %and, 255
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%and1 = shl i32 %x, 16
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%shl = and i32 %and1, 16711680
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%or = or i32 %shr, %shl
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ret i32 %or
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; CHECK-LABEL @test6
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; CHECK-NOT: rldicl 3, {{[0-9]+}}, 0, 32
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; CHECK: blr
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}
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define zeroext i32 @min(i32 zeroext %a, i32 zeroext %b) #0 {
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entry:
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%cmp = icmp ule i32 %a, %b
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%cond = select i1 %cmp, i32 %a, i32 %b
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ret i32 %cond
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; CHECK-LABEL @min
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; CHECK-NOT: rldicl 3, {{[0-9]+}}, 0, 32
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; CHECK: blr
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}
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attributes #0 = { nounwind readnone }
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