llvm-6502/test/CodeGen/X86/switch-order-weight.ll
Benjamin Kramer c511b2a5a1 SelectionDAGBuilder: When emitting small compare chains for switches order them by using edge weights.
SimplifyCFG tends to form a lot of 2-3 case switches when merging branches. Move
the most likely condition to the front so it is checked first and the others can
be skipped. This is currently not as effective as it could be because SimplifyCFG
destroys profiling metadata when merging branches and switches. Merging branch
weight metadata is tricky though.

This code touches at most 3 cases so I didn't use a proper sorting algorithm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157521 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-26 20:01:32 +00:00

38 lines
690 B
LLVM

; RUN: llc -mtriple=x86_64-apple-darwin11 < %s | FileCheck %s
; Check that the cases which lead to unreachable are checked after "10"
define void @test1(i32 %x) nounwind uwtable ssp {
entry:
switch i32 %x, label %if.end7 [
i32 0, label %if.then
i32 10, label %if.then2
i32 20, label %if.then5
]
; CHECK: test1:
; CHECK-NOT: unr
; CHECK: cmpl $10
; CHECK: bar
; CHECK: cmpl $20
if.then:
tail call void @unr(i32 23) noreturn nounwind
unreachable
if.then2:
tail call void @bar(i32 42) nounwind
br label %if.end7
if.then5:
tail call void @unr(i32 5) noreturn nounwind
unreachable
if.end7:
ret void
}
declare void @unr(i32) noreturn
declare void @bar(i32)